GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/tigerlake: Replace soc_get_pmc_mux_device with device pointers 

Now that device aliases can be used in the devicetree, the hacky function
'soc_get_pmc_mux_device' can be removed and replaced with pointers to the
devices the function was supposed to return (1 for each port).

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Ie00834c79bd5304998adaccb388ae74a108192b1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45747
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tim Wawrzynczak 2020-09-30 13:12:26 -06:00
parent dd0066a919
commit e7881ed447
4 changed files with 17 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/ec/google/chromeec/chip.h
View File

@ -3,7 +3,14 @@
#ifndef EC_GOOGLE_CHROMEEC_CHIP_H
#define EC_GOOGLE_CHROMEEC_CHIP_H
#include <device/device.h>
#include <stddef.h>
#define MAX_TYPEC_PORTS 4
struct ec_google_chromeec_config {
/* Pointer to PMC Mux connector for each Type-C port */
DEVTREE_CONST struct device *mux_conn[MAX_TYPEC_PORTS];
};
#endif /* EC_GOOGLE_CHROMEEC_CHIP_H */

50
src/ec/google/chromeec/ec_acpi.c
View File

@ -16,14 +16,6 @@
#define GOOGLE_CHROMEEC_USBC_DEVICE_HID "GOOG0014"
#define GOOGLE_CHROMEEC_USBC_DEVICE_NAME "USBC"
/* Avoid adding a false dependency on an SoC or intel/common */
extern const struct device *soc_get_pmc_mux_device(int port_number);
__weak const struct device *soc_get_pmc_mux_device(int port_number)
{
return NULL;
}
const char *google_chromeec_acpi_name(const struct device *dev)
{
/*
@ -121,36 +113,18 @@ static const char *port_location_to_str(enum ec_pd_port_location port_location)
static struct usb_pd_port_caps port_caps;
static void add_port_location(struct acpi_dp *dsd, int port_number)
{
acpi_dp_add_string(dsd, "port-location",
port_location_to_str(port_caps.port_location));
}
static int conn_id_to_match;
/* A callback to match a port's connector for dev_find_matching_device_on_bus */
static bool match_connector(DEVTREE_CONST struct device *dev)
{
if (CONFIG(DRIVERS_INTEL_PMC)) {
extern struct chip_operations drivers_intel_pmc_mux_conn_ops;
return (dev->chip_ops == &drivers_intel_pmc_mux_conn_ops &&
dev->path.type == DEVICE_PATH_GENERIC &&
dev->path.generic.id == conn_id_to_match);
}
return false;
acpi_dp_add_string(dsd, "port-location", port_location_to_str(port_caps.port_location));
}
static void fill_ssdt_typec_device(const struct device *dev)
{
struct ec_google_chromeec_config *config = dev->chip_info;
int rv;
int i;
unsigned int num_ports;
struct device *usb2_port;
struct device *usb3_port;
struct device *usb4_port;
const struct device *mux;
const struct device *conn;
if (google_chromeec_get_num_pd_ports(&num_ports))
return;
@ -166,32 +140,28 @@ static void fill_ssdt_typec_device(const struct device *dev)
if (rv)
continue;
/* Get the MUX device, and find the matching connector on its bus */
conn = NULL;
mux = soc_get_pmc_mux_device(i);
if (mux) {
conn_id_to_match = i;
conn = dev_find_matching_device_on_bus(mux->link_list, match_connector);
}
if (!config->mux_conn[i])
printk(BIOS_ERR, "ERROR: Mux connector info missing for Type-C port "
"#%d\n", i);
usb2_port = NULL;
usb3_port = NULL;
usb4_port = NULL;
get_usb_port_references(i, &usb2_port, &usb3_port, &usb4_port);
struct typec_connector_class_config config = {
struct typec_connector_class_config typec_config = {
.power_role = port_caps.power_role_cap,
.try_power_role = port_caps.try_power_role_cap,
.data_role = port_caps.data_role_cap,
.usb2_port = usb2_port,
.usb3_port = usb3_port,
.usb4_port = usb4_port,
.orientation_switch = conn,
.usb_role_switch = conn,
.mode_switch = conn,
.orientation_switch = config->mux_conn[i],
.usb_role_switch = config->mux_conn[i],
.mode_switch = config->mux_conn[i],
};
acpigen_write_typec_connector(&config, i, add_port_location);
acpigen_write_typec_connector(&typec_config, i, add_port_location);
}
acpigen_pop_len(); /* Device GOOGLE_CHROMEEC_USBC_DEVICE_NAME */

9
src/soc/intel/common/block/include/intelblocks/pmc.h
View File

@ -51,13 +51,4 @@ int pmc_soc_get_resources(struct pmc_resource_config *cfg);
/* API to set ACPI mode */
void pmc_set_acpi_mode(void);
/*
* Returns a reference to the PMC MUX device for the given port number.
* Returns NULL if not found or SoC does not support PMC MUX.
*
* Input: Port number (0-based)
* Output: Const pointer to PMC MUX device
*/
const struct device *soc_get_pmc_mux_device(int port_number);
#endif /* SOC_INTEL_COMMON_BLOCK_PMC_H */

22
src/soc/intel/tigerlake/pmc.c
View File

@ -126,28 +126,6 @@ static void soc_pmc_fill_ssdt(const struct device *dev)
dev_path(dev));
}
/* FIXME: Rewrite loop below without this. */
extern struct chip_operations drivers_intel_pmc_mux_ops;
/* By default, TGL uses the PMC MUX for all ports, so port_number is unused */
const struct device *soc_get_pmc_mux_device(int port_number)
{
const struct device *pmc;
struct device *child;
child = NULL;
pmc = pcidev_path_on_root(PCH_DEVFN_PMC);
if (!pmc || !pmc->link_list)
return NULL;
while ((child = dev_bus_each_child(pmc->link_list, child)) != NULL)
if (child->chip_ops == &drivers_intel_pmc_mux_ops)
break;
/* child will either be the correct device or NULL if not found */
return child;
}
static void soc_acpi_mode_init(struct device *dev)
{
/*