mediatek/mt8183: postpone dcxo low power mode setting
Consider the association between modem[1] and DCXO, this patch is a fix for eb5e47d("mediatek/mt8183: update dcxo output buffer setting") [2] We should not disable XO_CEL and block the bblpm request when modem is still ON. For power-saving, we still could disable unused XO_CEL and mask request to disable unused power mode when modem is no longer be used. [1] https://review.coreboot.org/c/coreboot/+/32666 [2] https://review.coreboot.org/c/coreboot/+/32323 BRANCH=none TEST=Boots correctly on Krane. Change-Id: I047ebed615e874977ca211aafd52b5551c71b764 Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34777 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
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@ -147,6 +147,7 @@ enum {
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/* PMIC DCXO Register Definition */
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/* PMIC DCXO Register Definition */
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enum {
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enum {
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PMIC_RG_DCXO_CW00 = 0x0788,
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PMIC_RG_DCXO_CW00 = 0x0788,
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PMIC_RG_DCXO_CW00_CLR = 0x078C,
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PMIC_RG_DCXO_CW02 = 0x0790,
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PMIC_RG_DCXO_CW02 = 0x0790,
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PMIC_RG_DCXO_CW07 = 0x079A,
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PMIC_RG_DCXO_CW07 = 0x079A,
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PMIC_RG_DCXO_CW09 = 0x079E,
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PMIC_RG_DCXO_CW09 = 0x079E,
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@ -218,5 +219,6 @@ void rtc_bbpu_power_on(void);
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void rtc_osc_init(void);
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void rtc_osc_init(void);
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int rtc_init(u8 recover);
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int rtc_init(u8 recover);
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void rtc_boot(void);
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void rtc_boot(void);
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void mt6358_dcxo_disable_unused(void);
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#endif /* SOC_MEDIATEK_MT8183_RTC_H */
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#endif /* SOC_MEDIATEK_MT8183_RTC_H */
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@ -411,10 +411,9 @@ static void dcxo_init(void)
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rtc_write(PMIC_RG_DCXO_CW16, 0x9855);
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rtc_write(PMIC_RG_DCXO_CW16, 0x9855);
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/* 26M enable control */
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/* 26M enable control */
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/* Enable clock buffer XO_SOC */
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/* Enable clock buffer XO_SOC, XO_CEL */
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rtc_write(PMIC_RG_DCXO_CW00, 0x4005);
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rtc_write(PMIC_RG_DCXO_CW00, 0x4805);
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rtc_write(PMIC_RG_DCXO_CW11, 0x8000);
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rtc_write(PMIC_RG_DCXO_CW11, 0x8000);
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rtc_write(PMIC_RG_DCXO_CW23, 0x0053);
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/* Load thermal coefficient */
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/* Load thermal coefficient */
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rtc_write(PMIC_RG_TOP_TMA_KEY, 0x9CA7);
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rtc_write(PMIC_RG_TOP_TMA_KEY, 0x9CA7);
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@ -432,6 +431,14 @@ static void dcxo_init(void)
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mdelay(5);
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mdelay(5);
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}
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}
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void mt6358_dcxo_disable_unused(void)
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{
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/* Disable clock buffer XO_CEL */
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rtc_write(PMIC_RG_DCXO_CW00_CLR, 0x0800);
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/* Mask bblpm */
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rtc_write(PMIC_RG_DCXO_CW23, 0x0053);
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}
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/* the rtc boot flow entry */
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/* the rtc boot flow entry */
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void rtc_boot(void)
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void rtc_boot(void)
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{
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{
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@ -17,6 +17,7 @@
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#include <soc/emi.h>
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#include <soc/emi.h>
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#include <soc/md_ctrl.h>
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#include <soc/md_ctrl.h>
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#include <soc/mmu_operations.h>
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#include <soc/mmu_operations.h>
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#include <soc/rtc.h>
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#include <soc/sspm.h>
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#include <soc/sspm.h>
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#include <symbols.h>
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#include <symbols.h>
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@ -29,6 +30,7 @@ static void soc_init(struct device *dev)
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{
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{
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mtk_mmu_disable_l2c_sram();
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mtk_mmu_disable_l2c_sram();
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mtk_md_early_init();
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mtk_md_early_init();
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mt6358_dcxo_disable_unused();
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sspm_init();
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sspm_init();
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}
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}
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