soc/mediatek/mt8186: Add support for regulator VPROC12/VSRAM_PROC12

To raise little CPU frequency, add support for VPROC12 and VSRAM_PROC12 of MT6366.

TEST=build pass
BUG=b:202871018

Signed-off-by: James Lo <james.lo@mediatek.corp-partner.google.com>
Change-Id: I718fdf36d34969a6e21ddc8c1ec6f525e0e20904
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen 2021-11-17 16:55:20 +08:00 committed by Felix Held
parent 580150de46
commit e7c9b5329a
2 changed files with 62 additions and 0 deletions

View File

@ -28,6 +28,9 @@ enum {
PMIC_TOP_TMA_KEY = 0x03a8, PMIC_TOP_TMA_KEY = 0x03a8,
PMIC_PWRHOLD = 0x0a08, PMIC_PWRHOLD = 0x0a08,
PMIC_CPSDSA4 = 0x0a2e, PMIC_CPSDSA4 = 0x0a2e,
PMIC_VPROC12_OP_EN = 0x1410,
PMIC_VPROC12_DBG0 = 0x141e,
PMIC_VPROC12_VOSEL = 0x1426,
PMIC_VCORE_OP_EN = 0x1490, PMIC_VCORE_OP_EN = 0x1490,
PMIC_VCORE_DBG0 = 0x149e, PMIC_VCORE_DBG0 = 0x149e,
PMIC_VCORE_VOSEL = 0x14aa, PMIC_VCORE_VOSEL = 0x14aa,
@ -37,6 +40,9 @@ enum {
PMIC_VDRAM1_VOSEL = 0x1626, PMIC_VDRAM1_VOSEL = 0x1626,
PMIC_SMPS_ANA_CON0 = 0x1808, PMIC_SMPS_ANA_CON0 = 0x1808,
PMIC_VDDQ_OP_EN = 0x1b16, PMIC_VDDQ_OP_EN = 0x1b16,
PMIC_VSRAM_PROC12_OP_EN = 0x1b90,
PMIC_VSRAM_PROC12_DBG0 = 0x1ba2,
PMIC_VSRAM_PROC12_VOSEL = 0x1bf0,
PMIC_LDO_VMC_CON0 = 0x1cc4, PMIC_LDO_VMC_CON0 = 0x1cc4,
PMIC_LDO_VMC_OP_EN = 0x1cc6, PMIC_LDO_VMC_OP_EN = 0x1cc6,
PMIC_LDO_VMCH_CON0 = 0x1cd8, PMIC_LDO_VMCH_CON0 = 0x1cd8,
@ -53,6 +59,8 @@ enum mt6366_regulator_id {
MT6366_VDDQ, MT6366_VDDQ,
MT6366_VMCH, MT6366_VMCH,
MT6366_VMC, MT6366_VMC,
MT6366_VPROC12,
MT6366_VSRAM_PROC12,
MT6366_REGULATOR_NUM, MT6366_REGULATOR_NUM,
}; };

View File

@ -493,6 +493,50 @@ static void pmic_set_vcore_vol(u32 vcore_uv)
udelay(1); udelay(1);
} }
static u32 pmic_get_vproc12_vol(void)
{
u16 vol_reg;
vol_reg = pwrap_read_field(PMIC_VPROC12_DBG0, 0x7F, 0);
return 500000 + vol_reg * 6250;
}
static void pmic_set_vproc12_vol(u32 v_uv)
{
u16 vol_reg;
assert(v_uv >= 500000);
assert(v_uv <= 1293750);
vol_reg = (v_uv - 500000) / 6250;
pwrap_write_field(PMIC_VPROC12_OP_EN, 1, 0x7F, 0);
pwrap_write_field(PMIC_VPROC12_VOSEL, vol_reg, 0x7F, 0);
udelay(1);
}
static u32 pmic_get_vsram_proc12_vol(void)
{
u16 vol_reg;
vol_reg = pwrap_read_field(PMIC_VSRAM_PROC12_DBG0, 0x7F, 0);
return 500000 + vol_reg * 6250;
}
static void pmic_set_vsram_proc12_vol(u32 v_uv)
{
u16 vol_reg;
assert(v_uv >= 500000);
assert(v_uv <= 1293750);
vol_reg = (v_uv - 500000) / 6250;
pwrap_write_field(PMIC_VSRAM_PROC12_OP_EN, 1, 0x7F, 0);
pwrap_write_field(PMIC_VSRAM_PROC12_VOSEL, vol_reg, 0x7F, 0);
udelay(1);
}
static u32 pmic_get_vdram1_vol(void) static u32 pmic_get_vdram1_vol(void)
{ {
u32 vol_reg; u32 vol_reg;
@ -779,6 +823,12 @@ void mt6366_set_voltage(enum mt6366_regulator_id id, u32 voltage_uv)
case MT6366_VMC: case MT6366_VMC:
pmic_set_vmc_vol(voltage_uv); pmic_set_vmc_vol(voltage_uv);
break; break;
case MT6366_VPROC12:
pmic_set_vproc12_vol(voltage_uv);
break;
case MT6366_VSRAM_PROC12:
pmic_set_vsram_proc12_vol(voltage_uv);
break;
default: default:
printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id);
break; break;
@ -798,6 +848,10 @@ u32 mt6366_get_voltage(enum mt6366_regulator_id id)
return pmic_get_vmch_vol(); return pmic_get_vmch_vol();
case MT6366_VMC: case MT6366_VMC:
return pmic_get_vmc_vol(); return pmic_get_vmc_vol();
case MT6366_VPROC12:
return pmic_get_vproc12_vol();
case MT6366_VSRAM_PROC12:
return pmic_get_vsram_proc12_vol();
default: default:
printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id); printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id);
break; break;