mb/google/brya/variants/brya0: add PL4 values for different SKUs
Add PL4 values for brya0 board for different CPU SKUs. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 with below messages, On brya (282): Overriding DPTF power limits PL1 (3000, 15000) PL2 (39000, 39000) PL4 (100000) On brya (482): Overriding DPTF power limits PL1 (4000, 28000) PL2 (43000, 43000) PL4 (105000) Change-Id: I095e9eda6665fd1927f35ee57d52922eddd8227a Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56916 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -4,11 +4,11 @@
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#include <device/pci_ids.h>
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const struct cpu_power_limits limits[] = {
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/* SKU_ID, pl1_min, pl1_max, pl2_min, pl2_max */
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/* PL2 values are for baseline config as per bug:191906315 comment #10 */
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 3000, 15000, 39000, 39000 },
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 4000, 28000, 43000, 43000 },
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 5000, 45000, 80000, 80000 },
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/* SKU_ID, pl1_min, pl1_max, pl2_min, pl2_max, pl4 */
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/* All values are for baseline config as per bug:191906315 comment #10 */
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 3000, 15000, 39000, 39000, 100000},
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 4000, 28000, 43000, 43000, 105000},
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{ PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 5000, 45000, 80000, 80000, 159000},
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};
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void variant_devtree_update(void)
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