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northbridge/intel/gm45/gma: Add backlight control register field 

This allows the backlight control register to be set via devicetree.cb

Change-Id: I32b42dfc1cc609fb6f8995c6158c85be67633770
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/9330
Tested-by: build bot (Jenkins)
This commit is contained in:
Timothy Pearson 2015-04-06 22:01:23 -05:00 committed by Patrick Georgi
parent 59c2c8b079
commit e7f70907ba
2 changed files with 7 additions and 2 deletions
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1
src/drivers/intel/gma/i915.h
View File

@ -291,6 +291,7 @@ struct i915_gpu_controller_info
int lvds_dual_channel;
int link_frequency_270_mhz;
int lvds_num_lanes;
u32 backlight;
};
int i915lightup(unsigned int physbase, unsigned int mmio,

8
src/northbridge/intel/gm45/gma.c
View File

@ -446,12 +446,13 @@ static void gma_func0_init(struct device *dev)
/* Init graphics power management */
gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0);
struct northbridge_intel_gm45_config *conf = dev->chip_info;
#if !CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT
/* PCI Init, will run VBIOS */
pci_dev_init(dev);
#else
u32 physbase;
struct northbridge_intel_gm45_config *conf = dev->chip_info;
struct resource *lfb_res;
struct resource *pio_res;
@ -475,7 +476,10 @@ static void gma_func0_init(struct device *dev)
/* Post VBIOS init */
/* Enable Backlight */
gtt_write(BLC_PWM_CTL2, (1 << 31));
gtt_write(BLC_PWM_CTL, 0x06100610);
if (conf->gfx.backlight == 0)
gtt_write(BLC_PWM_CTL, 0x06100610);
else
gtt_write(BLC_PWM_CTL, conf->gfx.backlight);
}
static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device)