fsp_sandybridge: Move to per-device ACPI.
Just took combined sandybridge per-device ACPI patch and applied it on FSP flavour to avoid need of separate tests. Change-Id: I09838cc01ede504416078edcb1c267a11539e714 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7044 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Vladimir Serbinenko
parent
e6e5b5ef55
commit
e7ff9d8839
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@ -30,11 +30,6 @@
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#include <device/pci_ids.h>
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#include <cpu/x86/msr.h>
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extern const unsigned char AmlCode[];
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#if CONFIG_HAVE_ACPI_SLIC
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unsigned long acpi_create_slic(unsigned long current);
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#endif
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#include "southbridge/intel/fsp_bd82x6x/nvs.h"
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#include "thermal.h"
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@ -48,7 +43,7 @@ static void acpi_update_thermal_table(global_nvs_t *gnvs)
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gnvs->flvl = 5;
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}
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static void acpi_create_gnvs(global_nvs_t *gnvs)
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void acpi_create_gnvs(global_nvs_t *gnvs)
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{
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gnvs_ = gnvs;
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memset((void *)gnvs, 0, sizeof(*gnvs));
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@ -97,13 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current)
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return current;
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}
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unsigned long acpi_fill_ssdt_generator(unsigned long current,
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const char *oem_table_id)
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{
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generate_cpu_entries();
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return (unsigned long) (acpigen_get_current());
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}
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unsigned long acpi_fill_slit(unsigned long current)
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{
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// Not implemented
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@ -115,145 +103,3 @@ unsigned long acpi_fill_srat(unsigned long current)
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/* No NUMA, no SRAT */
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return current;
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}
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void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
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#define ALIGN_CURRENT current = (ALIGN(current, 16))
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unsigned long write_acpi_tables(unsigned long start)
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{
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unsigned long current;
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int i;
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acpi_rsdp_t *rsdp;
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acpi_rsdt_t *rsdt;
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acpi_xsdt_t *xsdt;
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acpi_hpet_t *hpet;
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acpi_madt_t *madt;
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acpi_mcfg_t *mcfg;
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acpi_fadt_t *fadt;
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acpi_facs_t *facs;
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#if CONFIG_HAVE_ACPI_SLIC
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acpi_header_t *slic;
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#endif
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acpi_header_t *ssdt;
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acpi_header_t *dsdt;
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current = start;
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/* Align ACPI tables to 16byte */
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ALIGN_CURRENT;
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printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx.\n", start);
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/* We need at least an RSDP and an RSDT Table */
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rsdp = (acpi_rsdp_t *) current;
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current += sizeof(acpi_rsdp_t);
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ALIGN_CURRENT;
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rsdt = (acpi_rsdt_t *) current;
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current += sizeof(acpi_rsdt_t);
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ALIGN_CURRENT;
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xsdt = (acpi_xsdt_t *) current;
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current += sizeof(acpi_xsdt_t);
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ALIGN_CURRENT;
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/* clear all table memory */
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memset((void *) start, 0, current - start);
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acpi_write_rsdp(rsdp, rsdt, xsdt);
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acpi_write_rsdt(rsdt);
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acpi_write_xsdt(xsdt);
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printk(BIOS_DEBUG, "ACPI: * FACS\n");
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facs = (acpi_facs_t *) current;
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current += sizeof(acpi_facs_t);
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ALIGN_CURRENT;
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acpi_create_facs(facs);
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printk(BIOS_DEBUG, "ACPI: * DSDT\n");
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dsdt = (acpi_header_t *) current;
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memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
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current += dsdt->length;
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memcpy(dsdt, &AmlCode, dsdt->length);
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ALIGN_CURRENT;
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printk(BIOS_DEBUG, "ACPI: * FADT\n");
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fadt = (acpi_fadt_t *) current;
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current += sizeof(acpi_fadt_t);
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ALIGN_CURRENT;
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acpi_create_fadt(fadt, facs, dsdt);
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acpi_add_table(rsdp, fadt);
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/*
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* We explicitly add these tables later on:
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*/
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printk(BIOS_DEBUG, "ACPI: * HPET\n");
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hpet = (acpi_hpet_t *) current;
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current += sizeof(acpi_hpet_t);
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ALIGN_CURRENT;
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acpi_create_hpet(hpet);
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acpi_add_table(rsdp, hpet);
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/* If we want to use HPET Timers Linux wants an MADT */
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printk(BIOS_DEBUG, "ACPI: * MADT\n");
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madt = (acpi_madt_t *) current;
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acpi_create_madt(madt);
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current += madt->header.length;
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ALIGN_CURRENT;
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acpi_add_table(rsdp, madt);
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printk(BIOS_DEBUG, "ACPI: * MCFG\n");
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mcfg = (acpi_mcfg_t *) current;
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acpi_create_mcfg(mcfg);
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current += mcfg->header.length;
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ALIGN_CURRENT;
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acpi_add_table(rsdp, mcfg);
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/* Pack GNVS into the ACPI table area */
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for (i=0; i < dsdt->length; i++) {
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if (*(u32*)(((u32)dsdt) + i) == 0xC0DEBABE) {
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printk(BIOS_DEBUG, "ACPI: Patching up global NVS in "
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"DSDT at offset 0x%04x -> 0x%08lx\n", i, current);
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*(u32*)(((u32)dsdt) + i) = current; // 0x92 bytes
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acpi_save_gnvs(current);
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break;
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}
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}
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/* And fill it */
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acpi_create_gnvs((global_nvs_t *)current);
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/* And tell SMI about it */
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smm_setup_structures((void *)current, NULL, NULL);
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current += sizeof(global_nvs_t);
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ALIGN_CURRENT;
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/* We patched up the DSDT, so we need to recalculate the checksum */
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dsdt->checksum = 0;
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dsdt->checksum = acpi_checksum((void *)dsdt, dsdt->length);
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printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt,
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dsdt->length);
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#if CONFIG_HAVE_ACPI_SLIC
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printk(BIOS_DEBUG, "ACPI: * SLIC\n");
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slic = (acpi_header_t *)current;
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current += acpi_create_slic(current);
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ALIGN_CURRENT;
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acpi_add_table(rsdp, slic);
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#endif
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printk(BIOS_DEBUG, "ACPI: * SSDT\n");
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ssdt = (acpi_header_t *)current;
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acpi_create_ssdt_generator(ssdt, ACPI_TABLE_CREATOR);
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current += ssdt->length;
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acpi_add_table(rsdp, ssdt);
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ALIGN_CURRENT;
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printk(BIOS_DEBUG, "current = %lx\n", current);
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printk(BIOS_INFO, "ACPI: done.\n");
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return current;
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}
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@ -21,10 +21,12 @@
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config NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE
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bool
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select CPU_INTEL_FSP_MODEL_206AX
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select PER_DEVICE_ACPI_TABLES
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config NORTHBRIDGE_INTEL_FSP_IVYBRIDGE
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bool
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select CPU_INTEL_FSP_MODEL_306AX
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select PER_DEVICE_ACPI_TABLES
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if NORTHBRIDGE_INTEL_FSP_IVYBRIDGE || NORTHBRIDGE_INTEL_FSP_SANDYBRIDGE
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@ -29,7 +29,10 @@
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <build.h>
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#include <drivers/intel/gma/i915.h>
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#include <arch/acpigen.h>
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#include "northbridge.h"
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#include <cbmem.h>
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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@ -198,3 +201,15 @@ int init_igd_opregion(igd_opregion_t *opregion)
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return 0;
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}
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void *igd_make_opregion(void)
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{
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igd_opregion_t *opregion;
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printk(BIOS_DEBUG, "ACPI: * IGD OpRegion\n");
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opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, sizeof (*opregion));
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if (opregion)
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init_igd_opregion(opregion);
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return opregion;
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}
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@ -354,6 +354,7 @@ static struct device_operations mc_ops = {
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.enable = northbridge_enable,
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.scan_bus = 0,
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.ops_pci = &intel_pci_ops,
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.acpi_fill_ssdt_generator = generate_cpu_entries,
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};
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static const struct pci_driver mc_driver_0100 __pci_driver = {
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@ -32,6 +32,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
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select PCIEXP_ASPM
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select PCIEXP_COMMON_CLOCK
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select SPI_FLASH
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select PER_DEVICE_ACPI_TABLES
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config EHCI_BAR
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hex
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@ -31,8 +31,8 @@ Name(\DSEN, 1) // Display Output Switching Enable
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* we have to fix it up in coreboot's ACPI creation phase.
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*/
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OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0xf00)
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External(NVSA)
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OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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/* Miscellaneous */
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@ -31,7 +31,12 @@
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#include <arch/acpi.h>
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#include <cpu/cpu.h>
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#include <elog.h>
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#include <arch/acpigen.h>
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#include <drivers/intel/gma/i915.h>
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#include <cbmem.h>
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#include <string.h>
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#include "pch.h"
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#include "nvs.h"
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#define NMI_OFF 0
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@ -625,6 +630,32 @@ static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
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}
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}
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static void southbridge_inject_dsdt(void)
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{
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global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof (*gnvs));
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void *opregion;
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/* Calling northbridge code as gnvs contains opregion address. */
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opregion = igd_make_opregion();
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if (gnvs) {
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int scopelen;
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memset(gnvs, 0, sizeof (*gnvs));
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acpi_create_gnvs(gnvs);
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/* IGD OpRegion Base Address */
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gnvs->aslb = (u32)opregion;
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/* And tell SMI about it */
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smm_setup_structures(gnvs, NULL, NULL);
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/* Add it to DSDT. */
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scopelen = acpigen_write_scope("\\");
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scopelen += acpigen_write_name_dword("NVSA", (u32) gnvs);
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acpigen_patch_len(scopelen - 1);
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}
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}
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static struct pci_operations pci_ops = {
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.set_subsystem = set_subsystem,
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};
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@ -633,6 +664,8 @@ static struct device_operations device_ops = {
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.read_resources = pch_lpc_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pch_lpc_enable_resources,
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.write_acpi_tables = acpi_write_hpet,
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.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
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.init = lpc_init,
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.enable = pch_lpc_enable,
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.scan_bus = scan_static_bus,
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@ -156,3 +156,4 @@ typedef struct {
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/* Used in SMM to find the ACPI GNVS address */
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global_nvs_t *smm_get_gnvs(void);
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#endif
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void acpi_create_gnvs(global_nvs_t *gnvs);
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