mb/google/rex: Add ELAN6918 touchscreen
ELAN6918 Power Sequencing seems not perfectly matching with the previous platforms and setting GPP_C06 to high prior to the power sequencing is actually makes it work. Ideally Power Sequencing should be as below for ELAN6918 (in ACPI) `POWER enabled -> RESET deasserted -> Report EN enabled` But below sequence is only working currently: `Report EN enabled (ramstage) -> POWER enabled (ACPI) -> RESET deasserted (ACPI)` BUG=b:247029304 TEST=Verified ELAN touch panel is working as expected after booting Google/rex device to ChromeOS. Change-Id: Ideaeb0faa882b8e603534bbface51ea76923d436 Signed-off-by: Eran Mitrani <mitrani@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66990 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tarun Tuli <taruntuli@google.com>
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@ -5,6 +5,7 @@ config BOARD_GOOGLE_REX_COMMON
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select BOARD_ROMSIZE_KB_65536
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select BOARD_ROMSIZE_KB_65536
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select DRIVERS_GENERIC_MAX98357A
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select DRIVERS_GENERIC_MAX98357A
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select DRIVERS_SOUNDWIRE_ALC5682
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select DRIVERS_SOUNDWIRE_ALC5682
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select DRIVERS_WIFI_GENERIC
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select DRIVERS_WIFI_GENERIC
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC
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@ -95,7 +95,7 @@ static const struct pad_config gpio_table_id0[] = {
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PAD_CFG_GPI_LOCK(GPP_B23, NONE, LOCK_CONFIG),
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PAD_CFG_GPI_LOCK(GPP_B23, NONE, LOCK_CONFIG),
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/* GPP_C00 : [] ==> EN_PP3300_TCHSCR */
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/* GPP_C00 : [] ==> EN_PP3300_TCHSCR */
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PAD_CFG_GPO(GPP_C00, 1, DEEP),
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PAD_CFG_GPO(GPP_C00, 0, DEEP),
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/* GPP_C01 : [] ==> USI_RST_L */
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/* GPP_C01 : [] ==> USI_RST_L */
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PAD_CFG_GPO(GPP_C01, 0, DEEP),
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PAD_CFG_GPO(GPP_C01, 0, DEEP),
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/* GPP_C02 : GPP_C02_STRAP ==> Component NC */
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/* GPP_C02 : GPP_C02_STRAP ==> Component NC */
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@ -107,7 +107,20 @@ static const struct pad_config gpio_table_id0[] = {
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/* GPP_C05 : [] ==> WWAN_PERST_L_STRAP */
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/* GPP_C05 : [] ==> WWAN_PERST_L_STRAP */
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PAD_CFG_GPO(GPP_C05, 1, PLTRST),
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PAD_CFG_GPO(GPP_C05, 1, PLTRST),
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/* GPP_C06 : [] ==> USI_REPORT_EN */
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/* GPP_C06 : [] ==> USI_REPORT_EN */
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PAD_CFG_GPO(GPP_C06, 0, DEEP),
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/*
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* FIXME: Remove this code after resolving b/247029304.
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*
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* ELAN6918 Power Sequencing seems not perfectly matching
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* with the previous platforms and setting GPP_C06 to high prior
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* to the power sequencing is actually makes it work.
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*
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* Ideally Power Sequencing should be as below for ELAN6918 (in ACPI)
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* `POWER enabled -> RESET deasserted -> Report EN enabled`
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*
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* But below sequence is only working currently:
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* `Report EN enabled (ramstage) -> POWER enabled (ACPI) -> RESET deasserted (ACPI)`
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*/
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PAD_CFG_GPO(GPP_C06, 1, DEEP),
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/* GPP_C07 : [] ==> USI_INT */
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/* GPP_C07 : [] ==> USI_INT */
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PAD_CFG_GPI_APIC(GPP_C07, NONE, PLTRST, LEVEL, NONE),
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PAD_CFG_GPI_APIC(GPP_C07, NONE, PLTRST, LEVEL, NONE),
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/* GPP_C08 : [] ==> SOCHOT_ODL */
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/* GPP_C08 : [] ==> SOCHOT_ODL */
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@ -212,7 +212,24 @@ chip soc/intel/meteorlake
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device i2c 1a on end
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device i2c 1a on end
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end
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end
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end
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end
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device ref i2c1 on end
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device ref i2c1 on
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chip drivers/i2c/hid
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register "generic.hid" = ""ELAN6918""
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register "generic.desc" = ""ELAN Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C07_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C01)"
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register "generic.reset_delay_ms" = "20"
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register "generic.reset_off_delay_ms" = "2"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C00)"
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register "generic.enable_delay_ms" = "1"
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register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C06)"
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register "generic.stop_off_delay_ms" = "2"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 10 on end
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end
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end
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device ref i2c2 on end
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device ref i2c2 on end
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device ref i2c3 on
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device ref i2c3 on
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chip drivers/i2c/generic
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chip drivers/i2c/generic
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