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mb/google/rex: Add ELAN6918 touchscreen 

ELAN6918 Power Sequencing seems not perfectly matching
with the previous platforms and setting GPP_C06 to high prior
to the power sequencing is actually makes it work.

Ideally Power Sequencing should be as below for ELAN6918 (in ACPI)
`POWER enabled -> RESET deasserted -> Report EN enabled`

But below sequence is only working currently:
`Report EN enabled (ramstage) -> POWER enabled (ACPI) -> RESET
 deasserted (ACPI)`

BUG=b:247029304
TEST=Verified ELAN touch panel is working as expected after booting
Google/rex device to ChromeOS.

Change-Id: Ideaeb0faa882b8e603534bbface51ea76923d436
Signed-off-by: Eran Mitrani <mitrani@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
This commit is contained in:
Subrata Banik 2022-09-15 00:17:20 -07:00 committed by Martin L Roth
parent dbe4fe2c88
commit e8097f7a28
3 changed files with 34 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/mainboard/google/rex/Kconfig
View File

@ -5,6 +5,7 @@ config BOARD_GOOGLE_REX_COMMON
select BOARD_ROMSIZE_KB_65536
select DRIVERS_GENERIC_MAX98357A
select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_SOUNDWIRE_ALC5682
select DRIVERS_WIFI_GENERIC
select EC_GOOGLE_CHROMEEC

17
src/mainboard/google/rex/variants/rex0/gpio.c
View File

@ -95,7 +95,7 @@ static const struct pad_config gpio_table_id0[] = {
PAD_CFG_GPI_LOCK(GPP_B23, NONE, LOCK_CONFIG),
/* GPP_C00 : [] ==> EN_PP3300_TCHSCR */
PAD_CFG_GPO(GPP_C00, 1, DEEP),
PAD_CFG_GPO(GPP_C00, 0, DEEP),
/* GPP_C01 : [] ==> USI_RST_L */
PAD_CFG_GPO(GPP_C01, 0, DEEP),
/* GPP_C02 : GPP_C02_STRAP ==> Component NC */
@ -107,7 +107,20 @@ static const struct pad_config gpio_table_id0[] = {
/* GPP_C05 : [] ==> WWAN_PERST_L_STRAP */
PAD_CFG_GPO(GPP_C05, 1, PLTRST),
/* GPP_C06 : [] ==> USI_REPORT_EN */
PAD_CFG_GPO(GPP_C06, 0, DEEP),
/*
* FIXME: Remove this code after resolving b/247029304.
*
* ELAN6918 Power Sequencing seems not perfectly matching
* with the previous platforms and setting GPP_C06 to high prior
* to the power sequencing is actually makes it work.
*
* Ideally Power Sequencing should be as below for ELAN6918 (in ACPI)
* `POWER enabled -> RESET deasserted -> Report EN enabled`
*
* But below sequence is only working currently:
* `Report EN enabled (ramstage) -> POWER enabled (ACPI) -> RESET deasserted (ACPI)`
*/
PAD_CFG_GPO(GPP_C06, 1, DEEP),
/* GPP_C07 : [] ==> USI_INT */
PAD_CFG_GPI_APIC(GPP_C07, NONE, PLTRST, LEVEL, NONE),
/* GPP_C08 : [] ==> SOCHOT_ODL */

19
src/mainboard/google/rex/variants/rex0/overridetree.cb
View File

@ -212,7 +212,24 @@ chip soc/intel/meteorlake
device i2c 1a on end
end
end
device ref i2c1 on end
device ref i2c1 on
chip drivers/i2c/hid
register "generic.hid" = ""ELAN6918""
register "generic.desc" = ""ELAN Touchscreen""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C07_IRQ)"
register "generic.probed" = "1"
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C01)"
register "generic.reset_delay_ms" = "20"
register "generic.reset_off_delay_ms" = "2"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C00)"
register "generic.enable_delay_ms" = "1"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C06)"
register "generic.stop_off_delay_ms" = "2"
register "generic.has_power_resource" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
end
device ref i2c2 on end
device ref i2c3 on
chip drivers/i2c/generic