soc/intel/skylake: Use common mca_configure() API
Use mca_configure() API from cpulib to configure Intel Machine Check Architecture (MCA) Change-Id: Ia96cb82fff3def46dbecb09dee94de86f179abe6 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/21240 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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1 changed files with 4 additions and 24 deletions
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@ -324,29 +324,6 @@ static void set_energy_perf_bias(u8 policy)
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printk(BIOS_DEBUG, "cpu: energy policy set to %u\n", policy);
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printk(BIOS_DEBUG, "cpu: energy policy set to %u\n", policy);
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}
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}
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static void configure_mca(void)
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{
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msr_t msr;
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int i;
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int num_banks;
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msr = rdmsr(IA32_MCG_CAP);
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num_banks = msr.lo & 0xff;
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msr.lo = msr.hi = 0;
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/*
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* TODO(adurbin): This should only be done on a cold boot. Also, some
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* of these banks are core vs package scope. For now every CPU clears
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* every bank.
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*/
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for (i = 0; i < num_banks; i++) {
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/* Clear the machine check status */
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wrmsr(IA32_MC0_STATUS + (i * 4), msr);
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/* Initialize machine checks */
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wrmsr(IA32_MC0_CTL + i * 4,
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(msr_t) {.lo = 0xffffffff, .hi = 0xffffffff});
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}
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}
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static void configure_c_states(void)
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static void configure_c_states(void)
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{
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{
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msr_t msr;
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msr_t msr;
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@ -410,7 +387,10 @@ static void enable_pm_timer_emulation(void)
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void soc_core_init(device_t cpu)
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void soc_core_init(device_t cpu)
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{
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{
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/* Clear out pending MCEs */
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/* Clear out pending MCEs */
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configure_mca();
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/* TODO(adurbin): This should only be done on a cold boot. Also, some
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* of these banks are core vs package scope. For now every CPU clears
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* every bank. */
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mca_configure();
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/* Enable the local CPU apics */
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/* Enable the local CPU apics */
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enable_lapic_tpr();
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enable_lapic_tpr();
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