From e81ce0483db982c741eebdda649111eee22a853b Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 3 Jun 2017 20:00:36 -0600 Subject: [PATCH] payloads: change coreboot to lowercase MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The word 'coreboot' should always be written in lowercase, even at the start of a sentence. Change-Id: I2ec18ca55e0ea672343a951ab81a24a5630f45fd Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20028 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Philipp Deppenwiese --- payloads/bayou/lzma.c | 2 +- payloads/coreinfo/bootlog_module.c | 2 +- payloads/coreinfo/coreboot_module.c | 6 +++--- payloads/coreinfo/timestamps_module.c | 2 +- payloads/external/SeaBIOS/Kconfig | 2 +- payloads/libpayload/arch/arm64/main.c | 2 +- payloads/libpayload/libc/malloc.c | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/payloads/bayou/lzma.c b/payloads/bayou/lzma.c index a7a8717c6a..14bd921527 100644 --- a/payloads/bayou/lzma.c +++ b/payloads/bayou/lzma.c @@ -1,6 +1,6 @@ /* -Coreboot interface to memory-saving variant of LZMA decoder +coreboot interface to memory-saving variant of LZMA decoder (C)opyright 2006 Carl-Daniel Hailfinger Released under the GNU GPL v2 or later diff --git a/payloads/coreinfo/bootlog_module.c b/payloads/coreinfo/bootlog_module.c index b3f0deeea5..8a9e7a3e04 100644 --- a/payloads/coreinfo/bootlog_module.c +++ b/payloads/coreinfo/bootlog_module.c @@ -170,7 +170,7 @@ err_free: static int bootlog_module_redraw(WINDOW *win) { - print_module_title(win, "Coreboot Bootlog"); + print_module_title(win, "coreboot Bootlog"); if (!g_buf) { return -1; diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index 0b6cca8c31..adf8f1434f 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -42,10 +42,10 @@ int coreboot_module_redraw(WINDOW *win) int row = 2; int i; - print_module_title(win, "Coreboot Tables"); + print_module_title(win, "coreboot Tables"); if (tables_good) { - mvwprintw(win, row++, 1, "No Coreboot tables were found"); + mvwprintw(win, row++, 1, "No coreboot tables were found"); return 0; } @@ -249,7 +249,7 @@ static int coreboot_module_init(void) } struct coreinfo_module coreboot_module = { - .name = "Coreboot", + .name = "coreboot", .init = coreboot_module_init, .redraw = coreboot_module_redraw, }; diff --git a/payloads/coreinfo/timestamps_module.c b/payloads/coreinfo/timestamps_module.c index eedb3c9439..020fcc6971 100644 --- a/payloads/coreinfo/timestamps_module.c +++ b/payloads/coreinfo/timestamps_module.c @@ -228,7 +228,7 @@ static int timestamps_module_init(void) static int timestamps_module_redraw(WINDOW *win) { - print_module_title(win, "Coreboot Timestamps"); + print_module_title(win, "coreboot Timestamps"); if (!g_buf) return -1; diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig index 3f513a5444..d7d7e60bb6 100644 --- a/payloads/external/SeaBIOS/Kconfig +++ b/payloads/external/SeaBIOS/Kconfig @@ -57,7 +57,7 @@ config SEABIOS_VGA_COREBOOT depends on !(VGA_BIOS || VGA_ROM_RUN) && (VGA_TEXT_FRAMEBUFFER || LINEAR_FRAMEBUFFER) bool help - Coreboot can initialize the GPU of some mainboards. + coreboot can initialize the GPU of some mainboards. After initializing the GPU, the information about it can be passed to the payload. Provide an option rom that implements this legacy VGA BIOS compatibility requirement. diff --git a/payloads/libpayload/arch/arm64/main.c b/payloads/libpayload/arch/arm64/main.c index e616956b10..aa2292ffec 100644 --- a/payloads/libpayload/arch/arm64/main.c +++ b/payloads/libpayload/arch/arm64/main.c @@ -64,7 +64,7 @@ static void pre_sysinfo_scan_mmu_setup(void) mmu_presysinfo_memory_used(start, end - start); /* - * Memory range 2: Coreboot tables + * Memory range 2: coreboot tables * * Maximum size is assumed 2 pages in case it crosses the GRANULE_SIZE * boundary diff --git a/payloads/libpayload/libc/malloc.c b/payloads/libpayload/libc/malloc.c index b7ac1a7c60..595af63194 100644 --- a/payloads/libpayload/libc/malloc.c +++ b/payloads/libpayload/libc/malloc.c @@ -94,7 +94,7 @@ void init_dma_memory(void *start, u32 size) } /* - * DMA memory might not be zeroed by Coreboot on stage loading, so make + * DMA memory might not be zeroed by coreboot on stage loading, so make * sure we clear the magic cookie from last boot. */ *(hdrtype_t *)start = 0;