nb/intel/sandybridge: Use loops on DMI register groups
The DMI link consists of four lanes, grouped in two bundles. Therefore, some DMI registers may be organized as "per-lane" or "per-bundle". This can be seen in the DMI initialization sequence as series of equidistant offsets being programmed with the same value. Make this more obvious by factoring out the register groups using loops. With BUILD_TIMELESS=1, the binary of ASUS P8Z77-V LX2 remains identical. Change-Id: Iebf40b2a5b37ed9060a6660840ea6cdff7eb3fc3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39631 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons
Patrick Georgi
parent
44eeed0e5c
commit
e82b02c004
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@ -20,179 +20,184 @@ void early_init_dmi(void)
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{
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int i;
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DMIBAR32(0x0914) |= 0x80000000;
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DMIBAR32(0x0934) |= 0x80000000;
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0914 + (i << 5)) |= (1 << 31);
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}
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for (i = 0; i < 4; i++) {
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DMIBAR32(0x0a00 + (i << 4)) &= 0xf3ffffff;
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DMIBAR32(0x0a04 + (i << 4)) |= 0x800;
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DMIBAR32(0x0a00 + (i << 4)) &= ~0x0c000000;
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DMIBAR32(0x0a04 + (i << 4)) |= (1 << 11);
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}
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DMIBAR32(0x0c30) = (DMIBAR32(0x0c30) & 0xfffffff) | 0x40000000;
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DMIBAR32(0x0c30) = (DMIBAR32(0x0c30) & 0x0fffffff) | (1 << 30);
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0904 + (i << 5)) &= 0xfe3fffff;
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DMIBAR32(0x090c + (i << 5)) &= 0xfff1ffff;
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DMIBAR32(0x0904 + (i << 5)) &= ~0x01c00000;
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DMIBAR32(0x090c + (i << 5)) &= ~0x000e0000;
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}
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DMIBAR32(0x090c) &= 0xfe1fffff;
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DMIBAR32(0x092c) &= 0xfe1fffff;
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DMIBAR32(0x0904); // !!! = 0x7a1842ec
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DMIBAR32(0x0904) = 0x7a1842ec;
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DMIBAR32(0x090c); // !!! = 0x00000208
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DMIBAR32(0x090c) = 0x00000128;
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DMIBAR32(0x0924); // !!! = 0x7a1842ec
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DMIBAR32(0x0924) = 0x7a1842ec;
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DMIBAR32(0x092c); // !!! = 0x00000208
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DMIBAR32(0x092c) = 0x00000128;
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DMIBAR32(0x0700); // !!! = 0x46139008
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DMIBAR32(0x0700) = 0x46139008;
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DMIBAR32(0x0720); // !!! = 0x46139008
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DMIBAR32(0x0720) = 0x46139008;
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x090c + (i << 5)) &= ~0x01e00000;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0904 + (i << 5)); // !!! = 0x7a1842ec
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DMIBAR32(0x0904 + (i << 5)) = 0x7a1842ec;
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DMIBAR32(0x090c + (i << 5)); // !!! = 0x00000208
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DMIBAR32(0x090c + (i << 5)) = 0x00000128;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0700 + (i << 5)); // !!! = 0x46139008
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DMIBAR32(0x0700 + (i << 5)) = 0x46139008;
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}
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DMIBAR32(0x0c04); // !!! = 0x2e680008
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DMIBAR32(0x0c04) = 0x2e680008;
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DMIBAR32(0x0904); // !!! = 0x7a1842ec
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DMIBAR32(0x0904) = 0x3a1842ec;
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DMIBAR32(0x0924); // !!! = 0x7a1842ec
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DMIBAR32(0x0924) = 0x3a1842ec;
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DMIBAR32(0x0910); // !!! = 0x00006300
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DMIBAR32(0x0910) = 0x00004300;
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DMIBAR32(0x0930); // !!! = 0x00006300
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DMIBAR32(0x0930) = 0x00004300;
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DMIBAR32(0x0a00); // !!! = 0x03042010
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DMIBAR32(0x0a00) = 0x03042018;
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DMIBAR32(0x0a10); // !!! = 0x03042010
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DMIBAR32(0x0a10) = 0x03042018;
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DMIBAR32(0x0a20); // !!! = 0x03042010
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DMIBAR32(0x0a20) = 0x03042018;
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DMIBAR32(0x0a30); // !!! = 0x03042010
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DMIBAR32(0x0a30) = 0x03042018;
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0904 + (i << 5)); // !!! = 0x7a1842ec
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DMIBAR32(0x0904 + (i << 5)) = 0x3a1842ec;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0910 + (i << 5)); // !!! = 0x00006300
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DMIBAR32(0x0910 + (i << 5)) = 0x00004300;
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}
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for (i = 0; i < 4; i++) {
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DMIBAR32(0x0a00 + (i << 4)); // !!! = 0x03042010
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DMIBAR32(0x0a00 + (i << 4)) = 0x03042018;
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}
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DMIBAR32(0x0c00); // !!! = 0x29700c08
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DMIBAR32(0x0c00) = 0x29700c08;
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DMIBAR32(0x0a04); // !!! = 0x0c0708f0
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DMIBAR32(0x0a04) = 0x0c0718f0;
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DMIBAR32(0x0a14); // !!! = 0x0c0708f0
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DMIBAR32(0x0a14) = 0x0c0718f0;
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DMIBAR32(0x0a24); // !!! = 0x0c0708f0
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DMIBAR32(0x0a24) = 0x0c0718f0;
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DMIBAR32(0x0a34); // !!! = 0x0c0708f0
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DMIBAR32(0x0a34) = 0x0c0718f0;
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DMIBAR32(0x0900); // !!! = 0x50000000
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DMIBAR32(0x0900) = 0x50000000;
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DMIBAR32(0x0920); // !!! = 0x50000000
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DMIBAR32(0x0920) = 0x50000000;
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DMIBAR32(0x0908); // !!! = 0x51ffffff
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DMIBAR32(0x0908) = 0x51ffffff;
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DMIBAR32(0x0928); // !!! = 0x51ffffff
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DMIBAR32(0x0928) = 0x51ffffff;
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DMIBAR32(0x0a00); // !!! = 0x03042018
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DMIBAR32(0x0a00) = 0x03042018;
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DMIBAR32(0x0a10); // !!! = 0x03042018
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DMIBAR32(0x0a10) = 0x03042018;
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DMIBAR32(0x0a20); // !!! = 0x03042018
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DMIBAR32(0x0a20) = 0x03042018;
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DMIBAR32(0x0a30); // !!! = 0x03042018
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DMIBAR32(0x0a30) = 0x03042018;
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DMIBAR32(0x0700); // !!! = 0x46139008
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DMIBAR32(0x0700) = 0x46139008;
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DMIBAR32(0x0720); // !!! = 0x46139008
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DMIBAR32(0x0720) = 0x46139008;
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DMIBAR32(0x0904); // !!! = 0x3a1842ec
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DMIBAR32(0x0904) = 0x3a1846ec;
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DMIBAR32(0x0924); // !!! = 0x3a1842ec
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DMIBAR32(0x0924) = 0x3a1846ec;
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DMIBAR32(0x0a00); // !!! = 0x03042018
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DMIBAR32(0x0a00) = 0x03042018;
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DMIBAR32(0x0a10); // !!! = 0x03042018
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DMIBAR32(0x0a10) = 0x03042018;
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DMIBAR32(0x0a20); // !!! = 0x03042018
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DMIBAR32(0x0a20) = 0x03042018;
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DMIBAR32(0x0a30); // !!! = 0x03042018
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DMIBAR32(0x0a30) = 0x03042018;
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DMIBAR32(0x0908); // !!! = 0x51ffffff
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DMIBAR32(0x0908) = 0x51ffffff;
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DMIBAR32(0x0928); // !!! = 0x51ffffff
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DMIBAR32(0x0928) = 0x51ffffff;
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for (i = 0; i < 4; i++) {
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DMIBAR32(0x0a04 + (i << 4)); // !!! = 0x0c0708f0
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DMIBAR32(0x0a04 + (i << 4)) = 0x0c0718f0;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0900 + (i << 5)); // !!! = 0x50000000
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DMIBAR32(0x0900 + (i << 5)) = 0x50000000;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0908 + (i << 5)); // !!! = 0x51ffffff
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DMIBAR32(0x0908 + (i << 5)) = 0x51ffffff;
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}
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for (i = 0; i < 4; i++) {
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DMIBAR32(0x0a00 + (i << 4)); // !!! = 0x03042018
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DMIBAR32(0x0a00 + (i << 4)) = 0x03042018;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0700 + (i << 5)); // !!! = 0x46139008
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DMIBAR32(0x0700 + (i << 5)) = 0x46139008;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0904 + (i << 5)); // !!! = 0x3a1842ec
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DMIBAR32(0x0904 + (i << 5)) = 0x3a1846ec;
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}
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for (i = 0; i < 4; i++) {
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DMIBAR32(0x0a00 + (i << 4)); // !!! = 0x03042018
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DMIBAR32(0x0a00 + (i << 4)) = 0x03042018;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0908 + (i << 5)); // !!! = 0x51ffffff
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DMIBAR32(0x0908 + (i << 5)) = 0x51ffffff;
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}
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DMIBAR32(0x0c00); // !!! = 0x29700c08
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DMIBAR32(0x0c00) = 0x29700c08;
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DMIBAR32(0x0c0c); // !!! = 0x16063400
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DMIBAR32(0x0c0c) = 0x00063400;
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DMIBAR32(0x0700); // !!! = 0x46139008
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DMIBAR32(0x0700) = 0x46339008;
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DMIBAR32(0x0720); // !!! = 0x46139008
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DMIBAR32(0x0720) = 0x46339008;
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DMIBAR32(0x0700); // !!! = 0x46339008
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DMIBAR32(0x0700) = 0x45339008;
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DMIBAR32(0x0720); // !!! = 0x46339008
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DMIBAR32(0x0720) = 0x45339008;
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DMIBAR32(0x0700); // !!! = 0x45339008
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DMIBAR32(0x0700) = 0x453b9008;
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DMIBAR32(0x0720); // !!! = 0x45339008
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DMIBAR32(0x0720) = 0x453b9008;
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DMIBAR32(0x0700); // !!! = 0x453b9008
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DMIBAR32(0x0700) = 0x45bb9008;
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DMIBAR32(0x0720); // !!! = 0x453b9008
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DMIBAR32(0x0720) = 0x45bb9008;
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DMIBAR32(0x0700); // !!! = 0x45bb9008
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DMIBAR32(0x0700) = 0x45fb9008;
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DMIBAR32(0x0720); // !!! = 0x45bb9008
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DMIBAR32(0x0720) = 0x45fb9008;
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DMIBAR32(0x0914); // !!! = 0x9021a080
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DMIBAR32(0x0914) = 0x9021a280;
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DMIBAR32(0x0934); // !!! = 0x9021a080
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DMIBAR32(0x0934) = 0x9021a280;
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DMIBAR32(0x0914); // !!! = 0x9021a280
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DMIBAR32(0x0914) = 0x9821a280;
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DMIBAR32(0x0934); // !!! = 0x9021a280
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DMIBAR32(0x0934) = 0x9821a280;
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DMIBAR32(0x0a00); // !!! = 0x03042018
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DMIBAR32(0x0a00) = 0x03242018;
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DMIBAR32(0x0a10); // !!! = 0x03042018
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DMIBAR32(0x0a10) = 0x03242018;
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DMIBAR32(0x0a20); // !!! = 0x03042018
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DMIBAR32(0x0a20) = 0x03242018;
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DMIBAR32(0x0a30); // !!! = 0x03042018
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DMIBAR32(0x0a30) = 0x03242018;
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0700 + (i << 5)); // !!! = 0x46139008
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DMIBAR32(0x0700 + (i << 5)) = 0x46339008;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0700 + (i << 5)); // !!! = 0x46339008
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DMIBAR32(0x0700 + (i << 5)) = 0x45339008;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0700 + (i << 5)); // !!! = 0x45339008
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DMIBAR32(0x0700 + (i << 5)) = 0x453b9008;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0700 + (i << 5)); // !!! = 0x453b9008
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DMIBAR32(0x0700 + (i << 5)) = 0x45bb9008;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0700 + (i << 5)); // !!! = 0x45bb9008
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DMIBAR32(0x0700 + (i << 5)) = 0x45fb9008;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0914 + (i << 5)); // !!! = 0x9021a080
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DMIBAR32(0x0914 + (i << 5)) = 0x9021a280;
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}
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0914 + (i << 5)); // !!! = 0x9021a080
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DMIBAR32(0x0914 + (i << 5)) = 0x9821a280;
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}
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for (i = 0; i < 4; i++) {
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DMIBAR32(0x0a00 + (i << 4)); // !!! = 0x03042018
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DMIBAR32(0x0a00 + (i << 4)) = 0x03242018;
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}
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DMIBAR32(0x0258); // !!! = 0x40000600
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DMIBAR32(0x0258) = 0x60000600;
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DMIBAR32(0x0904); // !!! = 0x3a1846ec
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DMIBAR32(0x0904) = 0x2a1846ec;
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DMIBAR32(0x0914); // !!! = 0x9821a280
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DMIBAR32(0x0914) = 0x98200280;
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DMIBAR32(0x0924); // !!! = 0x3a1846ec
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DMIBAR32(0x0924) = 0x2a1846ec;
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DMIBAR32(0x0934); // !!! = 0x9821a280
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DMIBAR32(0x0934) = 0x98200280;
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for (i = 0; i < 2; i++) {
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DMIBAR32(0x0904 + (i << 5)); // !!! = 0x3a1846ec
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DMIBAR32(0x0904 + (i << 5)) = 0x2a1846ec;
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DMIBAR32(0x0914 + (i << 5)); // !!! = 0x9821a280
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DMIBAR32(0x0914 + (i << 5)) = 0x98200280;
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}
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DMIBAR32(0x022c); // !!! = 0x00c26460
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DMIBAR32(0x022c) = 0x00c2403c;
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early_pch_init_native_dmi_pre();
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/* Write once settings. */
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/* Write once settings */
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DMIBAR32(DMILCAP) = (DMIBAR32(DMILCAP) & ~0x3f00f) |
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(2 << 0) | // 5GT/s
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(2 << 12) | // L0s 128 ns to less than 256 ns
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(2 << 15); // L1 2 us to less than 4 us
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(2 << 0) | // 5GT/s
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(2 << 12) | // L0s 128 ns to less than 256 ns
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(2 << 15); // L1 2 us to less than 4 us
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DMIBAR8(DMILCTL) |= 0x20; // Retrain link
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DMIBAR8(DMILCTL) |= (1 << 5); // Retrain link
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while (DMIBAR16(DMILSTS) & TXTRN)
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;
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DMIBAR8(DMILCTL) |= 0x20; // Retrain link
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DMIBAR8(DMILCTL) |= (1 << 5); // Retrain link
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while (DMIBAR16(DMILSTS) & TXTRN)
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;
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const u8 w = (DMIBAR16(DMILSTS) >> 4) & 0x1f;
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const u16 t = (DMIBAR16(DMILSTS) & 0xf) * 2500;
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const u8 w = (DMIBAR16(DMILSTS) >> 4) & 0x1f;
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const u16 t = (DMIBAR16(DMILSTS) & 0x0f) * 2500;
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printk(BIOS_DEBUG, "DMI: Running at X%x @ %dMT/s\n", w, t);
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/*
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* Virtual Channel resources must match settings in RCBA!
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*
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* Channel Vp and Vm are documented in
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* "Desktop 4th Generation Intel Core Processor Family, Desktop Intel
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* Pentium Processor Family, and Desktop Intel Celeron Processor Family
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* Vol. 2"
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* Channel Vp and Vm are documented in:
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* "Desktop 4th Generation Intel Core Processor Family, Desktop Intel Pentium
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* Processor Family, and Desktop Intel Celeron Processor Family Vol. 2"
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*/
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/* Channel 0: Enable, Set ID to 0, map TC0 and TC3 and TC4 to VC0. */
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