google/fizz: Enable SATA on port 1

BUG=b:37486021
BRANCH=None
TEST=compile coreboot and make sure sda and sdb show
     up in /sys/class/block.

Change-Id: I11344a4a5fc7e5b5d907d25439f92744a5fb70da
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/19450
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Shelley Chen 2017-04-24 13:11:43 -07:00 committed by Patrick Georgi
parent 771e8c114f
commit e8365aa283
1 changed files with 1 additions and 0 deletions

View File

@ -28,6 +28,7 @@ chip soc/intel/skylake
register "SataSalpSupport" = "1"
register "SataMode" = "1"
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1"
register "EnableAzalia" = "1"
register "DspEnable" = "1"
register "IoBufferOwnership" = "3"