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mainboard/google/meowth: Turn on DBC over USB3.0 

Intel DCI (direct connect interface) allows debug Intel target using
USB3.0 ports. It will support debug via USB stack (DCI Dbc) using USB3.0
only.

BUG=None
TEST=Turn on DCI trace hub in descriptor.bin and flash the coreboot
image. Using DAL to halt/run CPU.

Change-Id: I39e68dabfcb9e659733019334299e562eee3681d
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/23446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Lijian Zhao 2018-01-25 17:39:06 -08:00 committed by Martin Roth
parent 3dd88f175d
commit e85e0f57ac
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/zoombini/variants/meowth/devicetree.cb
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@ -6,6 +6,9 @@ chip soc/intel/cannonlake
register "deep_s5_enable_ac" = "1" register "deep_s5_enable_ac" = "1"
register "deep_s5_enable_dc" = "1" register "deep_s5_enable_dc" = "1"
# Debug Option, set to DBC over USB 3.0 port only
register "DebugConsent" = "DebugConsent_USB3_DBC"
# GPE configuration # GPE configuration
# Note that GPE events called out in ASL code rely on this # Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE # route. i.e. If this route changes then the affected GPE