Add ACPI code for Lenvo X60
It currently supports: - Sleepbutton - AC state - Battery state - Interrupt routing - Display Brightness control - Hotkeys Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6368 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Sven Schnelle
parent
025ead7792
commit
e8a7df84ad
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@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select BOARD_ROMSIZE_KB_2048
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select CHANNEL_XOR_RANDOMIZATION
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select HAVE_SMI_HANDLER
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select HAVE_ACPI_TABLES
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config MAINBOARD_DIR
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string
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@ -0,0 +1,44 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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Field(ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset (0x46),
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, 4,
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HPAC, 1
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}
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Device(AC)
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{
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Name(_HID, "ACPI0003")
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Name(_UID, 0x00)
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Name(_PCL, Package() { \_SB } )
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Method(_PSR, 0, NotSerialized)
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{
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return (HPAC)
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}
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Method(_STA, 0, NotSerialized)
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{
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Return (0x0f)
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}
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}
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@ -0,0 +1,296 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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Field(ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset (0x38),
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B0ST, 4, /* Battery 0 state */
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, 1,
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B0CH, 1, /* Battery 0 charging */
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B0DI, 1, /* Battery 0 discharging */
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B0PR, 1, /* Battery 0 present */
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Offset (0x39),
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B1ST, 4, /* Battery 1 state */
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, 1,
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B1CH, 1, /* Battery 1 charging, */
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B1DI, 1, /* Battery 1 discharging,*/
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B1PR, 1 /* Battery 1 present */
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}
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/* EC Registers */
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/* PAGE == 0x00 */
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Field (ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset(0xa0),
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BARC, 16, /* Battery remaining capacity */
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BAFC, 16, /* Battery full charge capacity */
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Offset(0xa8),
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BAPR, 16, /* Battery present rate */
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BAVO, 16, /* Battery Voltage */
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}
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/* PAGE == 0x01 */
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Field (ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset(0xa0),
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, 15,
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BAMA, 1,
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}
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/* PAGE == 0x02 */
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Field (ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset(0xa0),
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BADC, 16, /* Design Capacity */
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BADV, 16, /* Design voltage */
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, 16,
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, 16,
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, 16,
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BASN, 16,
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}
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/* PAGE == 0x04: Battery type */
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Field (ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset(0xa0),
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BATY, 32
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}
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/* PAGE == 0x05: Battery OEM information */
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Field (ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset(0xa0),
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BAOE, 128
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}
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/* PAGE == 0x06: Battery name */
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Field (ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset(0xa0),
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BANA, 128
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}
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/* Arg0: Battery
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* Arg1: Battery Status Package
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* Arg2: charging
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* Arg3: discharging
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*/
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Method(BSTA, 4, NotSerialized)
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{
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Acquire(ECLK, 0xffff)
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Store(0, Local0)
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Or(1, Arg0, PAGE)
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Store(BAMA, Local1)
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Store(Arg0, PAGE) /* Battery dynamic information */
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Store(BAPR, Local2)
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if (Arg2) // charging
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{
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Or(2, Local0, Local0)
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If (LGreaterEqual (Local2, 0x8000)) {
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Store(0, Local2)
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}
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}
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if (Arg3) // discharging
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{
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Or(1, Local0, Local0)
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Subtract(0x10000, Local2, Local2)
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}
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Store(Local0, Index(Arg1, 0x00))
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if (Local1) {
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Multiply (BARC, 10, Index(Arg1, 2))
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Multiply (Local2, BAVO, Local2)
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Divide (Local2, 1000, Local3, Index(Arg1, 1))
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} else {
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Store(BARC, Index(Arg1, 2))
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Store(Local2, Index(Arg1, 1))
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}
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Store(BAVO, Index(Arg1, 3))
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Release(ECLK)
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Return (Arg1)
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}
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Method(BINF, 2, NotSerialized)
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{
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Acquire(ECLK, 0xffff)
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Or(1, Arg1, PAGE) /* Battery 0 static information */
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Xor(BAMA, 1, Index(Arg0, 0))
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Store(BAMA, Local0)
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Store(Arg1, PAGE)
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Store(BAFC, Local2)
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Or(2, Arg1, PAGE)
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Store(BADC, Local1)
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if (Local0)
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{
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Multiply (Local1, 10, Local1)
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Multiply (Local2, 10, Local2)
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}
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Store(Local1, Index(Arg0, 1)) // Design Capacity
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Store(Local2, Index(Arg0, 2)) // Last full charge capacity
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Store(BADV, Index(Arg0, 4)) // Design Voltage
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Divide (Local2, 20, Local0, Index(Arg0, 5)) // Warning capacity
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Store (BASN, Local0)
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Name (SERN, Buffer (0x06) { " " })
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Store (4, Local1)
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While (Local0)
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{
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Divide (Local0, 0x0A, Local2, Local0)
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Add (Local2, 48, Index (SERN, Local1))
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Decrement (Local1)
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}
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Store (SERN, Index (Arg0, 10)) // Serial Number
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Or(4, Arg1, PAGE)
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Name (TYPE, Buffer() { 0, 0, 0, 0, 0 })
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Store(BATY, TYPE)
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Store(TYPE, Index (Arg0, 11)) // Battery type
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Or(5, Arg1, PAGE)
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Store(BAOE, Index (Arg0, 12)) // OEM information
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Or(6, Arg1, PAGE)
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Store(BANA, Index (Arg0, 9)) // Model number
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Release(ECLK)
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Return (Arg0)
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}
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Device (BAT0)
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{
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Name (_HID, EisaId ("PNP0C0A"))
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Name (_UID, 0x00)
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Name (_PCL, Package () { \_SB })
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Name (BATS, Package ()
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{
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0x00, // 0: PowerUnit: Report in mWh
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0xFFFFFFFF, // 1: Design cap
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0xFFFFFFFF, // 2: Last full charge cap
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0x01, // 3: Battery Technology
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10800, // 4: Design Voltage (mV)
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0x00, // 5: Warning design capacity
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200, // 6: Low design capacity
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1, // 7: granularity1
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1, // 8: granularity2
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"", // 9: Model number
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"", // A: Serial number
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"", // B: Battery Type
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"" // C: OEM information
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})
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Method (_BIF, 0, NotSerialized)
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{
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Return (BINF(BATS, 0))
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}
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Name (BATI, Package ()
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{
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0, // Battery State
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// Bit 0 - discharge
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// Bit 1 - charge
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// Bit 2 - critical state
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0, // Battery present Rate
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0, // Battery remaining capacity
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0 // Battery present voltage
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})
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Method (_BST, 0, NotSerialized)
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{
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if (B0PR) {
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Return (BSTA(0, BATI, B0CH, B0DI))
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} else {
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Return (BATS)
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}
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}
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Method (_STA, 0, NotSerialized)
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{
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if (B0PR) {
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Return (0x1f)
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} else {
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Return (0x0f)
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}
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}
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}
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Device (BAT1)
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{
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Name (_HID, EisaId ("PNP0C0A"))
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Name (_UID, 0x00)
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Name (_PCL, Package () { \_SB })
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Name (BATS, Package ()
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{
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0x00, // 0: PowerUnit: Report in mWh
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0xFFFFFFFF, // 1: Design cap
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0xFFFFFFFF, // 2: Last full charge cap
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0x01, // 3: Battery Technology
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10800, // 4: Design Voltage (mV)
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0x00, // 5: Warning design capacity
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200, // 6: Low design capacity
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1, // 7: granularity1
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1, // 8: granularity2
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"", // 9: Model number
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"", // A: Serial number
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"", // B: Battery Type
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"" // C: OEM information
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})
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Method (_BIF, 0, NotSerialized)
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{
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Return (BINF(BATS, 0x10))
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}
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Name (BATI, Package ()
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{
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0, // Battery State
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// Bit 0 - discharge
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// Bit 1 - charge
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// Bit 2 - critical state
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0, // Battery present Rate
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0, // Battery remaining capacity
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0 // Battery present voltage
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})
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Method (_BST, 0, NotSerialized)
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{
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if (B1PR) {
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Return (BSTA(0x10, BATI, B1CH, B1DI))
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} else {
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Return (BATS)
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}
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}
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Method (_STA, 0, NotSerialized)
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{
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if (B1PR) {
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Return (0x1f)
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} else {
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Return (0x0f)
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}
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}
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}
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@ -0,0 +1,32 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
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*
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* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
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* published by the Free Software Foundation; version 2 of
|
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* the License.
|
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
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* GNU General Public License for more details.
|
||||
*
|
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* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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Field(ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset (0x06),
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SNDS, 8 /* Write to this register to generate sound */
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}
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Method(BEEP, 1, NotSerialized)
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{
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Store (Arg0, SNDS)
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}
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@ -0,0 +1,101 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
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*
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* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
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*
|
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
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* MA 02110-1301 USA
|
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*/
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Device(EC)
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{
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Name (_HID, EISAID("PNP0C09"))
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Name (_UID, 0)
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Name (_GPE, 28)
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Mutex (ECLK, 0)
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OperationRegion(ERAM, EmbeddedControl, 0x00, 0x100)
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Field (ERAM, ByteAcc, NoLock, Preserve)
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{
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Offset (0x05),
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HSPA, 1,
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Offset (0x0C),
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LEDS, 8, /* LED state */
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Offset (0x3B),
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, 1,
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KBLT, 1, /* Keyboard Light */
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Offset (0x81),
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PAGE, 8 /* Information Page Selector */
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}
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Method (_CRS, 0)
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{
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Name (ECMD, ResourceTemplate()
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{
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IO (Decode16, 0x62, 0x62, 1, 1)
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IO (Decode16, 0x66, 0x66, 1, 1)
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})
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Return (ECMD)
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}
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Method (LED, 1, NotSerialized)
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{
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Store(Arg0, LEDS)
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}
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Method (_INI, 0, NotSerialized)
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{
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}
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/* Sleep Button pressed */
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Method(_Q13, 0, NotSerialized)
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{
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Notify(\_SB.PCI0.LPCB.EC.SLPB, 0x80)
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}
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/* Brightness up GPE */
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Method(_Q14, 0, NotSerialized)
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{
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\DSPC.BRTU ()
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}
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/* Brightness down GPE */
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Method(_Q15, 0, NotSerialized)
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{
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\DSPC.BRTD()
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}
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/* AC status change: present */
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Method(_Q26, 0, NotSerialized)
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{
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Notify (AC, 0x80)
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Beep(6)
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}
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/* AC status change: not present */
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Method(_Q27, 0, NotSerialized)
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{
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Notify (AC, 0x80)
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Beep(6)
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}
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#include "ac.asl"
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#include "battery.asl"
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#include "sleepbutton.asl"
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#include "lid.asl"
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#include "beep.asl"
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}
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|
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@ -0,0 +1,63 @@
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/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
/* This is board specific information: IRQ routing for the
|
||||
* i945
|
||||
*/
|
||||
|
||||
|
||||
// PCI Interrupt Routing
|
||||
Method(_PRT)
|
||||
{
|
||||
If (PICM) {
|
||||
Return (Package() {
|
||||
Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA
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||||
Package() { 0x001bffff, 1, 0, 0x11 }, // Audio
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||||
Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge
|
||||
Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge
|
||||
Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge
|
||||
Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge
|
||||
Package() { 0x001dffff, 0, 0, 0x10 }, // USB
|
||||
Package() { 0x001dffff, 1, 0, 0x11 }, // USB
|
||||
Package() { 0x001dffff, 2, 0, 0x12 }, // USB
|
||||
Package() { 0x001dffff, 3, 0, 0x13 }, // USB
|
||||
Package() { 0x001fffff, 0, 0, 0x17 }, // LPC
|
||||
Package() { 0x001fffff, 1, 0, 0x10 }, // IDE
|
||||
Package() { 0x001fffff, 2, 0, 0x10 } // SATA
|
||||
})
|
||||
} Else {
|
||||
Return (Package() {
|
||||
Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // VGA
|
||||
Package() { 0x001bffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // Audio
|
||||
Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKE, 0 }, // PCI
|
||||
Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 }, // PCI
|
||||
Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKG, 0 }, // PCI
|
||||
Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKH, 0 }, // PCI
|
||||
Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKA, 0 }, // USB
|
||||
Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKB, 0 }, // USB
|
||||
Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 }, // USB
|
||||
Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKD, 0 }, // USB
|
||||
Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKH, 0 }, // LPC
|
||||
Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKA, 0 }, // IDE
|
||||
Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 } // SATA
|
||||
})
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2007-2009 coresystems GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
/* This is board specific information: IRQ routing for the
|
||||
* 0:1e.0 PCI bridge of the ICH7
|
||||
*/
|
||||
|
||||
If (PICM) {
|
||||
Return (Package() {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x11 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x12 },
|
||||
Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 },
|
||||
Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x15 },
|
||||
Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x16 },
|
||||
Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x14 }
|
||||
})
|
||||
} Else {
|
||||
Return (Package() {
|
||||
Package (0x04) { 0x0000FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 },
|
||||
Package (0x04) { 0x0000FFFF, 0x01, \_SB.PCI0.LPCB.LNKB, 0x00 },
|
||||
Package (0x04) { 0x0000FFFF, 0x02, \_SB.PCI0.LPCB.LNKC, 0x00 },
|
||||
Package (0x04) { 0x0001FFFF, 0x00, \_SB.PCI0.LPCB.LNKA, 0x00 },
|
||||
Package (0x04) { 0x0002FFFF, 0x00, \_SB.PCI0.LPCB.LNKF, 0x00 },
|
||||
Package (0x04) { 0x0002FFFF, 0x01, \_SB.PCI0.LPCB.LNKG, 0x00 },
|
||||
Package (0x04) { 0x0008FFFF, 0x00, \_SB.PCI0.LPCB.LNKE, 0x00 }
|
||||
})
|
||||
}
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
Field(ERAM, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0x46),
|
||||
, 2,
|
||||
LIDS , 1
|
||||
}
|
||||
|
||||
Device(LID)
|
||||
{
|
||||
Name(_HID, "PNP0C0D")
|
||||
|
||||
Method(_LId, 0, NotSerialized)
|
||||
{
|
||||
return (LIDS)
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,206 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2007-2009 coresystems GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
/* These come from the dynamically created CPU SSDT */
|
||||
External(PDC0)
|
||||
External(PDC1)
|
||||
|
||||
/* The APM port can be used for generating software SMIs */
|
||||
|
||||
OperationRegion (APMP, SystemIO, 0xb2, 2)
|
||||
Field (APMP, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
APMC, 8, // APM command
|
||||
APMS, 8 // APM status
|
||||
}
|
||||
|
||||
/* Port 80 POST */
|
||||
|
||||
OperationRegion (POST, SystemIO, 0x80, 1)
|
||||
Field (POST, ByteAcc, Lock, Preserve)
|
||||
{
|
||||
DBG0, 8
|
||||
}
|
||||
|
||||
/* SMI I/O Trap */
|
||||
Method(TRAP, 1, Serialized)
|
||||
{
|
||||
Store (Arg0, SMIF) // SMI Function
|
||||
Store (0, TRP0) // Generate trap
|
||||
Return (SMIF) // Return value of SMI handler
|
||||
}
|
||||
|
||||
/* The _PIC method is called by the OS to choose between interrupt
|
||||
* routing via the i8259 interrupt controller or the APIC.
|
||||
*
|
||||
* _PIC is called with a parameter of 0 for i8259 configuration and
|
||||
* with a parameter of 1 for Local Apic/IOAPIC configuration.
|
||||
*/
|
||||
|
||||
Method(_PIC, 1)
|
||||
{
|
||||
// Remember the OS' IRQ routing choice.
|
||||
Store(Arg0, PICM)
|
||||
}
|
||||
|
||||
/* The _PTS method (Prepare To Sleep) is called before the OS is
|
||||
* entering a sleep state. The sleep state number is passed in Arg0
|
||||
*/
|
||||
|
||||
Method(_PTS,1)
|
||||
{
|
||||
// Call a trap so SMI can prepare for Sleep as well.
|
||||
// TRAP(0x55)
|
||||
}
|
||||
|
||||
/* The _WAK method is called on system wakeup */
|
||||
|
||||
Method(_WAK,1)
|
||||
{
|
||||
// CPU specific part
|
||||
|
||||
// Notify PCI Express slots in case a card
|
||||
// was inserted while a sleep state was active.
|
||||
|
||||
// Are we going to S3?
|
||||
If (LEqual(Arg0, 3)) {
|
||||
// ..
|
||||
}
|
||||
|
||||
// Are we going to S4?
|
||||
If (LEqual(Arg0, 4)) {
|
||||
// ..
|
||||
}
|
||||
|
||||
// TODO: Windows XP SP2 P-State restore
|
||||
|
||||
Return(Package(){0,0})
|
||||
}
|
||||
|
||||
// Power notification
|
||||
|
||||
External (\_PR_.CPU0, DeviceObj)
|
||||
External (\_PR_.CPU1, DeviceObj)
|
||||
|
||||
Method (PNOT)
|
||||
{
|
||||
If (MPEN) {
|
||||
If(And(PDC0, 0x08)) {
|
||||
Notify (\_PR_.CPU0, 0x80) // _PPC
|
||||
|
||||
If (And(PDC0, 0x10)) {
|
||||
Sleep(100)
|
||||
Notify(\_PR_.CPU0, 0x81) // _CST
|
||||
}
|
||||
}
|
||||
|
||||
If(And(PDC1, 0x08)) {
|
||||
Notify (\_PR_.CPU1, 0x80) // _PPC
|
||||
If (And(PDC1, 0x10)) {
|
||||
Sleep(100)
|
||||
Notify(\_PR_.CPU1, 0x81) // _CST
|
||||
}
|
||||
}
|
||||
|
||||
} Else { // UP
|
||||
Notify (\_PR_.CPU0, 0x80)
|
||||
Sleep(0x64)
|
||||
Notify(\_PR_.CPU0, 0x81)
|
||||
}
|
||||
|
||||
// Notify the Batteries
|
||||
Notify(\_SB.PCI0.LPCB.EC.BAT0, 0x80) // Execute BAT1 _BST
|
||||
Notify(\_SB.PCI0.LPCB.EC.BAT1, 0x80) // Execute BAT2 _BST
|
||||
}
|
||||
|
||||
/* System Bus */
|
||||
|
||||
Scope(\_SB)
|
||||
{
|
||||
/* This method is placed on the top level, so we can make sure it's the
|
||||
* first executed _INI method.
|
||||
*/
|
||||
Method(_INI, 0)
|
||||
{
|
||||
/* The DTS data in NVS is probably not up to date.
|
||||
* Update temperature values and make sure AP thermal
|
||||
* interrupts can happen
|
||||
*/
|
||||
|
||||
// TRAP(71) // TODO
|
||||
|
||||
/* Determine the Operating System and save the value in OSYS.
|
||||
* We have to do this in order to be able to work around
|
||||
* certain windows bugs.
|
||||
*
|
||||
* OSYS value | Operating System
|
||||
* -----------+------------------
|
||||
* 2000 | Windows 2000
|
||||
* 2001 | Windows XP(+SP1)
|
||||
* 2002 | Windows XP SP2
|
||||
* 2006 | Windows Vista
|
||||
* ???? | Windows 7
|
||||
*/
|
||||
|
||||
/* Let's assume we're running at least Windows 2000 */
|
||||
Store (2000, OSYS)
|
||||
|
||||
If (CondRefOf(_OSI, Local0)) {
|
||||
/* Linux answers _OSI with "True" for a couple of
|
||||
* Windows version queries. But unlike Windows it
|
||||
* needs a Video repost, so let's determine whether
|
||||
* we're running Linux.
|
||||
*/
|
||||
|
||||
If (_OSI("Linux")) {
|
||||
Store (1, LINX)
|
||||
}
|
||||
|
||||
If (_OSI("Windows 2001")) {
|
||||
Store (2001, OSYS)
|
||||
}
|
||||
|
||||
If (_OSI("Windows 2001 SP1")) {
|
||||
Store (2001, OSYS)
|
||||
}
|
||||
|
||||
If (_OSI("Windows 2001 SP2")) {
|
||||
Store (2002, OSYS)
|
||||
}
|
||||
|
||||
If (_OSI("Windows 2006")) {
|
||||
Store (2006, OSYS)
|
||||
}
|
||||
}
|
||||
|
||||
/* And the OS workarounds start right after we know what we're
|
||||
* running: Windows XP SP1 needs to have C-State coordination
|
||||
* enabled in SMM.
|
||||
*/
|
||||
If (LAnd(LEqual(OSYS, 2001), MPEN)) {
|
||||
// TRAP(61) // TODO
|
||||
}
|
||||
|
||||
/* SMM power state and C4-on-C3 settings need to be updated */
|
||||
// TRAP(43) // TODO
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
Device(SLPB)
|
||||
{
|
||||
Name (_HID, EisaId ("PNP0C0E"))
|
||||
}
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (c) 2011 Sven Schnelle <svens@stackframe.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
Device (DSPC)
|
||||
{
|
||||
Name (_ADR, 0x00020001)
|
||||
OperationRegion (DSPC, PCI_Config, 0x00, 0x100)
|
||||
Field (DSPC, ByteAcc, NoLock, Preserve)
|
||||
{
|
||||
Offset (0xf4),
|
||||
BRTC, 8
|
||||
}
|
||||
|
||||
Method(BRTD, 0, NotSerialized)
|
||||
{
|
||||
Store(BRTC, Local0)
|
||||
if (LGreater (Local0, 15))
|
||||
{
|
||||
Subtract(Local0, 16, Local0)
|
||||
Store(Local0, BRTC)
|
||||
}
|
||||
}
|
||||
|
||||
Method(BRTU, 0, NotSerialized)
|
||||
{
|
||||
Store (BRTC, Local0)
|
||||
if (LLess(Local0, 0xff))
|
||||
{
|
||||
Add (Local0, 16, Local0)
|
||||
Store(Local0, BRTC)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,56 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2007-2009 coresystems GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; version 2 of
|
||||
* the License.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
|
||||
* MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
DefinitionBlock(
|
||||
"dsdt.aml",
|
||||
"DSDT",
|
||||
0x03, // DSDT revision: ACPI v3.0
|
||||
"COREv4", // OEM id
|
||||
"COREBOOT", // OEM table id
|
||||
0x20090419 // OEM revision
|
||||
)
|
||||
{
|
||||
// Some generic macros
|
||||
#include "acpi/platform.asl"
|
||||
|
||||
// global NVS and variables
|
||||
#include "../../../southbridge/intel/i82801gx/acpi/globalnvs.asl"
|
||||
|
||||
// General Purpose Events
|
||||
#include "acpi/gpe.asl"
|
||||
|
||||
// mainboard specific devices
|
||||
#include "acpi/mainboard.asl"
|
||||
|
||||
// Thermal Zone
|
||||
#include "acpi/thermal.asl"
|
||||
|
||||
Scope (\_SB) {
|
||||
Device (PCI0)
|
||||
{
|
||||
#include "../../../northbridge/intel/i945/acpi/i945.asl"
|
||||
#include "../../../southbridge/intel/i82801gx/acpi/ich7.asl"
|
||||
}
|
||||
}
|
||||
|
||||
/* Chipset specific sleep states */
|
||||
#include "../../../southbridge/intel/i82801gx/acpi/sleepstates.asl"
|
||||
}
|
||||
Loading…
Reference in New Issue