clean up VGA and Expansion ROM support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Li-Ta Lo
parent
5b772cca55
commit
e8b1c9dbd1
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@ -16,7 +16,7 @@
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device_t find_dev_path(struct bus *parent, struct device_path *path)
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{
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device_t child;
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for(child = parent->children; child; child = child->sibling) {
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for (child = parent->children; child; child = child->sibling) {
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if (path_eq(path, &child->path)) {
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break;
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}
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@ -42,7 +42,8 @@ device_t alloc_find_dev(struct bus *parent, struct device_path *path)
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}
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/**
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* Given a bus and a devfn number, find the device structure
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* @brief Given a PCI bus and a devfn number, find the device structure
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*
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* @param bus The bus number
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* @param devfn a device/function number
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* @return pointer to the device structure
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@ -369,7 +370,8 @@ resource_t resource_max(struct resource *resource)
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* @param dev the device the stored resorce lives on
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* @param resource the resource that was just stored.
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*/
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void report_resource_stored(device_t dev, struct resource *resource, const char *comment)
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void report_resource_stored(device_t dev, struct resource *resource,
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const char *comment)
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{
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if (resource->flags & IORESOURCE_STORED) {
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unsigned char buf[10];
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@ -390,6 +392,7 @@ void report_resource_stored(device_t dev, struct resource *resource, const char
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(resource->flags & IORESOURCE_IO)? "io":
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(resource->flags & IORESOURCE_DRQ)? "drq":
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(resource->flags & IORESOURCE_IRQ)? "irq":
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(resource->flags & IORESOURCE_READONLY)? "rom":
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(resource->flags & IORESOURCE_MEM)? "mem":
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"????",
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comment);
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@ -53,6 +53,7 @@ static uint16_t pci_moving_config16(struct device *dev, unsigned reg)
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return ones ^ zeroes;
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}
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static uint32_t pci_moving_config32(struct device *dev, unsigned reg)
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{
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uint32_t value, ones, zeroes;
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@ -92,7 +93,6 @@ unsigned pci_find_capability(device_t dev, unsigned cap)
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return 0;
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}
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/** Given a device and register, read the size of the BAR for that register.
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* @param dev Pointer to the device structure
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* @param resource Pointer to the resource structure
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@ -134,7 +134,7 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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if (moving) {
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resource->size = 1;
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resource->align = resource->gran = 0;
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while(!(moving & resource->size)) {
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while (!(moving & resource->size)) {
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resource->size <<= 1;
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resource->align += 1;
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resource->gran += 1;
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@ -158,15 +158,13 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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dev_path(dev), index, value);
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}
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resource->flags = 0;
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}
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else if (attr & PCI_BASE_ADDRESS_SPACE_IO) {
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} else if (attr & PCI_BASE_ADDRESS_SPACE_IO) {
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/* An I/O mapped base address */
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attr &= PCI_BASE_ADDRESS_IO_ATTR_MASK;
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resource->flags |= IORESOURCE_IO;
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/* I don't want to deal with 32bit I/O resources */
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resource->limit = 0xffff;
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}
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else {
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} else {
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/* A Memory mapped base address */
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attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK;
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resource->flags |= IORESOURCE_MEM;
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@ -177,17 +175,14 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_32) {
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/* 32bit limit */
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resource->limit = 0xffffffffUL;
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}
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else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) {
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} else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_1M) {
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/* 1MB limit */
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resource->limit = 0x000fffffUL;
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}
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else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) {
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} else if (attr == PCI_BASE_ADDRESS_MEM_LIMIT_64) {
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/* 64bit limit */
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resource->limit = 0xffffffffffffffffULL;
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resource->flags |= IORESOURCE_PCI64;
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}
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else {
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} else {
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/* Invalid value */
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resource->flags = 0;
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}
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@ -217,26 +212,10 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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return resource;
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}
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/** Read the base address registers for a given device.
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* @param dev Pointer to the dev structure
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* @param howmany How many registers to read (6 for device, 2 for bridge)
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*/
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static void pci_read_bases(struct device *dev, unsigned int howmany)
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{
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unsigned long index;
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for (index = PCI_BASE_ADDRESS_0; (index < PCI_BASE_ADDRESS_0 + (howmany << 2)); ) {
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struct resource *resource;
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resource = pci_get_resource(dev, index);
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index += (resource->flags & IORESOURCE_PCI64)?8:4;
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}
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compact_resources(dev);
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}
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static void pci_read_rom_resource(struct device *dev, unsigned long index)
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static void pci_get_rom_resource(struct device *dev, unsigned long index)
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{
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struct resource *resource;
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unsigned long value, attr;
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unsigned long value;
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resource_t moving, limit;
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/* Initialize the resources to nothing */
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@ -248,7 +227,7 @@ static void pci_read_rom_resource(struct device *dev, unsigned long index)
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/* See which bits move */
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moving = pci_moving_config32(dev, index);
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/* clear the Enable bit */
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moving = moving & 0xffffffffe;
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moving = moving & ~PCI_ROM_ADDRESS_ENABLE;
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/* Find the resource constraints.
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*
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@ -262,14 +241,12 @@ static void pci_read_rom_resource(struct device *dev, unsigned long index)
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if (moving) {
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resource->size = 1;
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resource->align = resource->gran = 0;
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while(!(moving & resource->size)) {
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while (!(moving & resource->size)) {
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resource->size <<= 1;
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resource->align += 1;
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resource->gran += 1;
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}
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resource->limit = limit = moving | (resource->size - 1);
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printk_debug("%s, rom size: %x, limit: %x\n",
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dev_path(dev), resource->size, limit);
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}
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if (moving == 0) {
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@ -281,8 +258,25 @@ static void pci_read_rom_resource(struct device *dev, unsigned long index)
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} else {
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resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY;
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}
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compact_resources(dev);
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}
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/** Read the base address registers for a given device.
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* @param dev Pointer to the dev structure
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* @param howmany How many registers to read (6 for device, 2 for bridge)
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*/
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static void pci_read_bases(struct device *dev, unsigned int howmany, unsigned long rom)
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{
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unsigned long index;
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for (index = PCI_BASE_ADDRESS_0; (index < PCI_BASE_ADDRESS_0 + (howmany << 2)); ) {
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struct resource *resource;
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resource = pci_get_resource(dev, index);
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index += (resource->flags & IORESOURCE_PCI64)?8:4;
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}
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if (rom)
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pci_get_rom_resource(dev, rom);
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compact_resources(dev);
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}
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static void pci_set_resource(struct device *dev, struct resource *resource);
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@ -328,7 +322,6 @@ static void pci_bridge_read_bases(struct device *dev)
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{
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resource_t moving_base, moving_limit, moving;
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/* See if the bridge I/O resources are implemented */
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moving_base = ((uint32_t)pci_moving_config8(dev, PCI_IO_BASE)) << 8;
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moving_base |= ((uint32_t)pci_moving_config16(dev, PCI_IO_BASE_UPPER16)) << 16;
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@ -339,10 +332,8 @@ static void pci_bridge_read_bases(struct device *dev)
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moving = moving_base & moving_limit;
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/* Initialize the io space constraints on the current bus */
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pci_record_bridge_resource(
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dev, moving, PCI_IO_BASE,
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IORESOURCE_IO, IORESOURCE_IO);
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pci_record_bridge_resource(dev, moving, PCI_IO_BASE,
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IORESOURCE_IO, IORESOURCE_IO);
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/* See if the bridge prefmem resources are implemented */
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moving_base = ((resource_t)pci_moving_config16(dev, PCI_PREF_MEMORY_BASE)) << 16;
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@ -353,11 +344,9 @@ static void pci_bridge_read_bases(struct device *dev)
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moving = moving_base & moving_limit;
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/* Initiliaze the prefetchable memory constraints on the current bus */
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pci_record_bridge_resource(
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dev, moving, PCI_PREF_MEMORY_BASE,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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IORESOURCE_MEM | IORESOURCE_PREFETCH);
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pci_record_bridge_resource(dev, moving, PCI_PREF_MEMORY_BASE,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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IORESOURCE_MEM | IORESOURCE_PREFETCH);
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/* See if the bridge mem resources are implemented */
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moving_base = ((uint32_t)pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16;
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@ -366,10 +355,9 @@ static void pci_bridge_read_bases(struct device *dev)
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moving = moving_base & moving_limit;
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/* Initialize the memory resources on the current bus */
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pci_record_bridge_resource(
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dev, moving, PCI_MEMORY_BASE,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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IORESOURCE_MEM);
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pci_record_bridge_resource(dev, moving, PCI_MEMORY_BASE,
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IORESOURCE_MEM | IORESOURCE_PREFETCH,
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IORESOURCE_MEM);
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compact_resources(dev);
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}
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@ -378,9 +366,7 @@ void pci_dev_read_resources(struct device *dev)
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{
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uint32_t addr;
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pci_read_bases(dev, 6);
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pci_read_rom_resource(dev, PCI_ROM_ADDRESS);
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pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
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}
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void pci_bus_read_resources(struct device *dev)
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@ -388,9 +374,7 @@ void pci_bus_read_resources(struct device *dev)
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uint32_t addr;
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pci_bridge_read_bases(dev);
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pci_read_bases(dev, 2);
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pci_read_rom_resource(dev, PCI_ROM_ADDRESS1);
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pci_read_bases(dev, 2, PCI_ROM_ADDRESS1);
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}
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static void pci_set_resource(struct device *dev, struct resource *resource)
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@ -722,9 +706,8 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
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*
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* @return The maximum bus number found, after scanning all subordinate busses
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*/
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unsigned int pci_scan_bus(struct bus *bus,
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unsigned min_devfn, unsigned max_devfn,
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unsigned int max)
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unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn,
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unsigned int max)
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{
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unsigned int devfn;
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device_t dev;
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@ -1000,8 +983,7 @@ static void pci_level_irq(unsigned char intNum)
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-kevinh@ispiri.com
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*/
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void pci_assign_irqs(unsigned bus, unsigned slot,
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const unsigned char pIntAtoD[4])
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void pci_assign_irqs(unsigned bus, unsigned slot, const unsigned char pIntAtoD[4])
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{
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unsigned functNum;
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device_t pdev;
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@ -196,8 +196,8 @@ static unsigned int amdk8_scan_chains(device_t dev, unsigned int max)
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return max;
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}
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static int reg_useable(unsigned reg,
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device_t goal_dev, unsigned goal_nodeid, unsigned goal_link)
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static int reg_useable(unsigned reg, device_t goal_dev, unsigned goal_nodeid,
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unsigned goal_link)
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{
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struct resource *res;
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unsigned nodeid, link;
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@ -221,9 +221,7 @@ static int reg_useable(unsigned reg,
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}
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#if 0
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printk_debug("reg: %02x result: %d gnodeid: %u glink: %u nodeid: %u link: %u\n",
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reg, result,
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goal_nodeid, goal_link,
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nodeid, link);
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reg, result, goal_nodeid, goal_link, nodeid, link);
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#endif
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return result;
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}
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@ -420,28 +418,36 @@ static void amdk8_set_resource(device_t dev, struct resource *resource, unsigned
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report_resource_stored(dev, resource, buf);
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}
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/**
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*
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* I tried to reuse the resource allocation code in amdk8_set_resource()
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* but it is too diffcult to deal with the resource allocation magic.
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*/
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static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
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{
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struct resource *resource;
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unsigned link;
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uint32_t base, limit;
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unsigned reg;
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/* find out which link the VGA card is connected,
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* we only deal with the 'first' vga card */
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for (link = 0; link < dev->links; link++) {
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if (dev->link[link].bridge_ctrl & PCI_BRIDGE_CTL_VGA) {
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printk_info("%s: bridge on link %d has VGA device\n",
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dev_path(dev), link);
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printk_info("creating MEM pair for VGA memory\n");
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/* Initialize the io space constraints on the current bus */
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resource = amdk8_find_mempair(dev, nodeid, link);
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printk_info("MEM pair register %x\n", resource->index - 0x100);
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resource->base = 0xa0000;
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resource->size = 0x20000;
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resource->gran = 16;
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resource->align = 16;
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resource->flags = IORESOURCE_MEM | IORESOURCE_FIXED | IORESOURCE_ASSIGNED;
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break;
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}
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}
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#if 1
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/* no VGA card installed */
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if (link == dev->links)
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return;
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/* allocate a temp resrouce for legacy VGA buffer */
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resource = amdk8_find_mempair(dev, nodeid, link);
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resource->base = 0xa0000;
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resource->size = 0x20000;
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/* write the resource to the hardware */
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reg = resource->index & 0xfc;
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base = f1_read_config32(reg);
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limit = f1_read_config32(reg + 0x4);
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@ -455,10 +461,10 @@ static void amdk8_create_vga_resource(device_t dev, unsigned nodeid)
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f1_write_config32(reg + 0x4, limit);
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f1_write_config32(reg, base);
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/* release the resource */
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/* release the temp resource */
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resource->flags = 0;
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#endif
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}
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static void amdk8_set_resources(device_t dev)
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{
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unsigned nodeid, link;
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@ -474,7 +480,7 @@ static void amdk8_set_resources(device_t dev)
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amdk8_set_resource(dev, &dev->resource[i], nodeid);
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}
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for(link = 0; link < dev->links; link++) {
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for (link = 0; link < dev->links; link++) {
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struct bus *bus;
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bus = &dev->link[link];
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if (bus->children) {
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@ -549,7 +555,7 @@ static void pci_domain_read_resources(device_t dev)
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/* Find the already assigned resource pairs */
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get_fx_devs();
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for(reg = 0x80; reg <= 0xd8; reg+= 0x08) {
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for (reg = 0x80; reg <= 0xd8; reg+= 0x08) {
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uint32_t base, limit;
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base = f1_read_config32(reg);
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limit = f1_read_config32(reg + 0x04);
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@ -584,7 +590,7 @@ static void pci_domain_read_resources(device_t dev)
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}
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static void ram_resource(device_t dev, unsigned long index,
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unsigned long basek, unsigned long sizek)
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unsigned long basek, unsigned long sizek)
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{
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struct resource *resource;
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@ -642,7 +648,7 @@ static void pci_domain_set_resources(device_t dev)
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#endif
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idx = 10;
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for(i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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uint32_t base, limit;
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unsigned basek, limitk, sizek;
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base = f1_read_config32(0x40 + (i << 3));
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@ -689,7 +695,7 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
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{
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unsigned reg;
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/* Unmap all of the HT chains */
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for(reg = 0xe0; reg <= 0xec; reg += 4) {
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for (reg = 0xe0; reg <= 0xec; reg += 4) {
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f1_write_config32(reg, 0);
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}
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max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0x18, 0), 0xff, max);
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@ -712,7 +718,7 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
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/* Find which cpus are present */
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cpu_bus = &dev->link[0];
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for(i = 0; i < 8; i++) {
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for (i = 0; i < 8; i++) {
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device_t dev, cpu;
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struct device_path cpu_path;
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@ -743,8 +749,8 @@ static unsigned int cpu_bus_scan(device_t dev, unsigned int max)
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/* Report what I have done */
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if (cpu) {
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printk_debug("CPU: %s %s\n",
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dev_path(cpu), cpu->enabled?"enabled":"disabled");
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printk_debug("CPU: %s %s\n", dev_path(cpu),
|
||||
cpu->enabled?"enabled":"disabled");
|
||||
}
|
||||
}
|
||||
return max;
|
||||
|
|
|
|||
Loading…
Reference in New Issue