mainboard/google/puff: Enable func0 of 1c for nic

Two things here:

 i. ) FSP requires that function 0 be enabled whenever any non-zero
      functions hang under the same bus:device.

 ii.) FSP reorders function 6 RP to be function 0 if function 0 is
      indeed unused.

BUG=b:146437819
BRANCH=none
TEST=none

Change-Id: I0f499a23495e18cfcc712c7c96024433a6181a4c
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37913
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Edward O'Callaghan 2019-12-23 23:12:19 +11:00 committed by Edward O'Callaghan
parent 95bff2e17e
commit e8b7ff1ab5
1 changed files with 2 additions and 1 deletions

View File

@ -175,7 +175,8 @@ chip soc/intel/cannonlake
end
end #I2C #4
device pci 1a.0 on end # eMMC
device pci 1c.6 on end # PCI Express Port 7, RTL8111H Ethernet NIC.
device pci 1c.0 on end # FSP requires func0 be enabled.
device pci 1c.6 on end # RTL8111H Ethernet NIC (becomes RP1).
device pci 1e.3 off end # GSPI #1
end