mb/intel/kblrvp: Factor out `IoBufferOwnership`

RVP11 and RVP3 set it to zero, the other two omit the setting.

Tested with BUILD_TIMELESS=1, all four variants do not change.

Change-Id: I6b393f0f2269f62b415456c17ba5962f46a1c5d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43909
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb

@@ -24,6 +24,7 @@ chip soc/intel/skylake
 
 	# FSP Configuration
 	register "HeciEnabled" = "0"
+	register "IoBufferOwnership" = "0"
 	register "ScsEmmcHs400Enabled" = "1"
 	register "ScsSdCardEnabled" = "2"
 	register "SkipExtGfxScan" = "1"

src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb

@@ -2,7 +2,6 @@ chip soc/intel/skylake
 
 	# FSP Configuration
 	register "DspEnable" = "0"
-	register "IoBufferOwnership" = "0"
 	register "ScsEmmcHs400Enabled" = "0"
 	register "ScsSdCardEnabled" = "0"
 	register "Device4Enable" = "0"

src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb

@@ -8,7 +8,6 @@ chip soc/intel/skylake
 
 	# FSP Configuration
 	register "DspEnable" = "1"
-	register "IoBufferOwnership" = "0"
 	register "PmTimerDisabled" = "1"
 	register "Cio2Enable" = "1"
 	register "SaImguEnable" = "1"