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mb/intel/kblrvp: Factor out `IoBufferOwnership` 

RVP11 and RVP3 set it to zero, the other two omit the setting.

Tested with BUILD_TIMELESS=1, all four variants do not change.

Change-Id: I6b393f0f2269f62b415456c17ba5962f46a1c5d1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43909
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-07-26 17:21:57 +02:00
parent defdc8539b
commit e8c8283a26
3 changed files with 1 additions and 2 deletions
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1
src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb
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@ -24,6 +24,7 @@ chip soc/intel/skylake
# FSP Configuration # FSP Configuration
register "HeciEnabled" = "0" register "HeciEnabled" = "0"
register "IoBufferOwnership" = "0"
register "ScsEmmcHs400Enabled" = "1" register "ScsEmmcHs400Enabled" = "1"
register "ScsSdCardEnabled" = "2" register "ScsSdCardEnabled" = "2"
register "SkipExtGfxScan" = "1" register "SkipExtGfxScan" = "1"

1
src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
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@ -2,7 +2,6 @@ chip soc/intel/skylake
# FSP Configuration # FSP Configuration
register "DspEnable" = "0" register "DspEnable" = "0"
register "IoBufferOwnership" = "0"
register "ScsEmmcHs400Enabled" = "0" register "ScsEmmcHs400Enabled" = "0"
register "ScsSdCardEnabled" = "0" register "ScsSdCardEnabled" = "0"
register "Device4Enable" = "0" register "Device4Enable" = "0"

1
src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb
View File

@ -8,7 +8,6 @@ chip soc/intel/skylake
# FSP Configuration # FSP Configuration
register "DspEnable" = "1" register "DspEnable" = "1"
register "IoBufferOwnership" = "0"
register "PmTimerDisabled" = "1" register "PmTimerDisabled" = "1"
register "Cio2Enable" = "1" register "Cio2Enable" = "1"
register "SaImguEnable" = "1" register "SaImguEnable" = "1"