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mb/google/guybrush/port_descriptors: use enum values for link speed 

Use GEN3 from enum dxio_link_speed_cap instead of the number 3.

TEST=Timeless build results in identical firmware image for guybrush

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0dddc57e05ec2395ca980bb63320bb9ee5242c29
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62908
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2022-03-17 21:11:31 +01:00
parent 2bf9599cf1
commit e9172a14f9
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/google/guybrush/port_descriptors.c
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@ -14,7 +14,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = {
.port_present = true,
.start_logical_lane = 0,
.end_logical_lane = 0,
.link_speed_capability = 3,
.link_speed_capability = GEN3,
.device_number = PCI_SLOT(WLAN_DEVFN),
.function_number = PCI_FUNC(WLAN_DEVFN),
.link_aspm = ASPM_L1,
@ -29,7 +29,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = {
.port_present = true,
.start_logical_lane = 1,
.end_logical_lane = 1,
.link_speed_capability = 3,
.link_speed_capability = GEN3,
.device_number = PCI_SLOT(SD_DEVFN),
.function_number = PCI_FUNC(SD_DEVFN),
.link_aspm = ASPM_L1,
@ -45,7 +45,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = {
.port_present = true,
.start_logical_lane = 2,
.end_logical_lane = 2,
.link_speed_capability = 3,
.link_speed_capability = GEN3,
.device_number = PCI_SLOT(WWAN_DEVFN),
.function_number = PCI_FUNC(WWAN_DEVFN),
.link_aspm = ASPM_L1,
@ -60,7 +60,7 @@ static fsp_dxio_descriptor guybrush_czn_dxio_descriptors[] = {
.port_present = true,
.start_logical_lane = 4,
.end_logical_lane = 7,
.link_speed_capability = 3,
.link_speed_capability = GEN3,
.device_number = PCI_SLOT(NVME_DEVFN),
.function_number = PCI_FUNC(NVME_DEVFN),
.link_aspm = ASPM_L1,