From e91785dfd8fd29a2f39a1f0ceb143015536706fb Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 6 Nov 2023 19:23:40 +0100 Subject: [PATCH] soc/amd/common,stoneyridge: drop invalid hda_soc_ssdt_quirks Drop the hda_soc_ssdt_quirks function since it doesn't apply for any of the SoCs supported by the Stoneyridge code which was the only SoC implementing it. This code was added when commit 91a7abf25c72 ("soc/amd/hda: Move HDA PCI device from DSDT to SSDT") rewrote the code originally added in commit 1587dc8a2b4d ("soc/amd/stoneyridge: Add northbridge support") as a copy from northbridge/amd/pi/00670F00. This code was moved around in commit 6580408a7e0a ("amd/pi/hudson: Move audio to northbridge"), since the HDA controller was moved from the FCH to the northbridge complex. When the controller was moved, the PCI config space interface also changed, so those bits are no longer the DisableNoSnoop, DisableNoSnoopOverride, and EnableNoSnoopRequest bits of the Misc Control register of the HDA controller, but some bits within the ClassCodeW field of the ACGAZ Mirrot Reg Ctrl 0 register. BKDG #55072 Rev 3.04 (Stoneyridge), BKDG #50742 Rev 3.08 (family 15h model 60h-6fh / 00670F00), and BKDG #52740 Rev 3.05 (family 16h model 30h-3fh) were used as a reference. Only the SoC with BKDG #52740 still has the HDA controller in the FCH; the other two have it in the northbridge. Signed-off-by: Felix Held Change-Id: I77fc76752b1c7de62ba8a196f15c198f55be3074 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78940 Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/hda/hda.c | 13 +---- .../amd/common/block/include/amdblocks/hda.h | 11 ----- src/soc/amd/stoneyridge/northbridge.c | 47 ------------------- 3 files changed, 1 insertion(+), 70 deletions(-) delete mode 100644 src/soc/amd/common/block/include/amdblocks/hda.h diff --git a/src/soc/amd/common/block/hda/hda.c b/src/soc/amd/common/block/hda/hda.c index e8436ed9ce..4e1c409d48 100644 --- a/src/soc/amd/common/block/hda/hda.c +++ b/src/soc/amd/common/block/hda/hda.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include -#include #include #include #include @@ -20,23 +19,13 @@ static const char *hda_acpi_name(const struct device *dev) return "AZHD"; } -__weak void hda_soc_ssdt_quirks(const struct device *dev) -{ -} - -static void hda_fill_ssdt(const struct device *dev) -{ - acpi_device_write_pci_dev(dev); - hda_soc_ssdt_quirks(dev); -} - static struct device_operations hda_audio_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .ops_pci = &pci_dev_ops_pci, .acpi_name = hda_acpi_name, - .acpi_fill_ssdt = hda_fill_ssdt, + .acpi_fill_ssdt = acpi_device_write_pci_dev, }; static const struct pci_driver hdaaudio_driver __pci_driver = { diff --git a/src/soc/amd/common/block/include/amdblocks/hda.h b/src/soc/amd/common/block/include/amdblocks/hda.h deleted file mode 100644 index a7a0b84f04..0000000000 --- a/src/soc/amd/common/block/include/amdblocks/hda.h +++ /dev/null @@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef AMD_BLOCK_HDA_H -#define AMD_BLOCK_HDA_H - -#include - -/* SoC callback to add any quirks to HDA device node in SSDT. */ -void hda_soc_ssdt_quirks(const struct device *dev); - -#endif /* AMD_BLOCK_HDA_H */ diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 081bc1f47d..1e601cf4b7 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -3,7 +3,6 @@ #include #include #include -#include #include #include #include @@ -408,49 +407,3 @@ void SetNbMidParams(GNB_MID_CONFIGURATION *params) params->iGpuVgaMode = 0; params->GnbIoapicAddress = IO_APIC2_ADDR; } - -void hda_soc_ssdt_quirks(const struct device *dev) -{ - const char *scope = acpi_device_path(dev); - static const struct fieldlist list[] = { - FIELDLIST_OFFSET(0x42), - FIELDLIST_NAMESTR("NSDI", 1), - FIELDLIST_NAMESTR("NSDO", 1), - FIELDLIST_NAMESTR("NSEN", 1), - }; - struct opregion opreg = OPREGION("AZPD", PCI_CONFIG, 0x0, 0x100); - - assert(scope); - - acpigen_write_scope(scope); - - /* - * OperationRegion(AZPD, PCI_Config, 0x00, 0x100) - * Field (AZPD, AnyAcc, NoLock, Preserve) { - * Offset (0x42), - * NSDI, 1, - * NSDO, 1, - * NSEN, 1, - * } - */ - acpigen_write_opregion(&opreg); - acpigen_write_field(opreg.name, list, ARRAY_SIZE(list), - FIELD_ANYACC | FIELD_NOLOCK | FIELD_PRESERVE); - - /* - * Method (_INI, 0, NotSerialized) { - * Store (Zero, NSEN) - * Store (One, NSDO) - * Store (One, NSDI) - * } - */ - acpigen_write_method("_INI", 0); - - acpigen_write_store_op_to_namestr(ZERO_OP, "NSEN"); - acpigen_write_store_op_to_namestr(ONE_OP, "NSDO"); - acpigen_write_store_op_to_namestr(ONE_OP, "NSDI"); - - acpigen_pop_len(); /* Method _INI */ - - acpigen_pop_len(); /* Scope */ -}