mb/google/volteer/var/elemi: enable Genesys Logic GL9763E
Enable Genesys GL9763E as PCI-to-eMMC bridge. BUG=b:171467336 BRANCH=volteer TEST=emerge-volteer coreboot Signed-off-by: Wisley Chen <wisley.chen@quantatw.com> Change-Id: I858c12151df5b6fc19132869317edfa1b090335d Reviewed-on: https://review.coreboot.org/c/coreboot/+/47040 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -3,6 +3,7 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER
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select BOARD_ROMSIZE_KB_32768
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select DRIVERS_GENERIC_GPIO_KEYS
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select DRIVERS_GENERIC_MAX98357A
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select DRIVERS_GENESYSLOGIC_GL9763E
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_SX9310
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@ -6,6 +6,13 @@ chip soc/intel/tigerlake
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register "IomTypeCPortPadCfg[0]" = "0x090E000A"
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register "IomTypeCPortPadCfg[1]" = "0x090E000D"
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# Enable EMMC PCIE 5 using clk 5
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register "PcieRpEnable[4]" = "1"
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register "PcieRpLtrEnable[4]" = "1"
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register "PcieRpHotPlug[4]" = "1"
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register "PcieClkSrcUsage[5]" = "4"
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register "PcieClkSrcClkReq[5]" = "5"
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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@ -184,6 +191,7 @@ chip soc/intel/tigerlake
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device generic 0 on end
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end
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end
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device ref pcie_rp5 on end
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device ref pmc hidden
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# The pmc_mux chip driver is a placeholder for the
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# PMC.MUX device in the ACPI hierarchy.
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