google/kahlee: Fix ASL whitespace and formatting

Clean up the ASL whitespace and formatting to match the iasl -d
style as other parts of coreboot.

Change-Id: I61689cb55dc26cbad160d45aa0a36c00b386fe0c
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19843
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/mainboard/google/kahlee/acpi/carrizo_fch.asl

@@ -13,7 +13,8 @@
  * GNU General Public License for more details.
  */
 
-Device(AAHB) {
+Device (AAHB)
+{
 	Name (_HID, "AAHB0000")
 	Name (_UID, 0x0)
 	Name (_CRS, ResourceTemplate()
@@ -21,34 +22,42 @@ Device(AAHB) {
 		Memory32Fixed (ReadWrite, 0xFEDC0000, 0x2000)
 	})
 
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 		Return (0x0F)
 	}
 }
 
-Device(GPIO) {
+Device (GPIO)
+{
 	Name (_HID, "AMD0030")
 	Name (_CID, "AMD0030")
 	Name(_UID, 0)
 
-	Name(_CRS, ResourceTemplate() {
+	Name (_CRS, ResourceTemplate()
-		Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {7}
+	{
+		Interrupt (ResourceConsumer, Level, ActiveLow, Shared, , , )
+			{ 7 }
 		Memory32Fixed (ReadWrite, 0xFED81500, 0x300)
 	})
 
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 		Return (0x0F)
 	}
 }
 
-Device(FUR0) {
+Device (FUR0)
+{
 	Name (_HID, "AMD0020")
 	Name (_UID, 0x0)
-	Name(_CRS, ResourceTemplate() {
+	Name (_CRS, ResourceTemplate()
+	{
 		IRQ (Edge, ActiveHigh, Exclusive) { 10 }
 		Memory32Fixed (ReadWrite, 0xFEDC6000, 0x2000)
 	})
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 		Return (0x0F)
 	}
 }
@@ -56,11 +65,13 @@ Device(FUR0) {
 Device (FUR1) {
 	Name (_HID, "AMD0020")
 	Name (_UID, 0x1)
-	Name(_CRS, ResourceTemplate() {
+	Name (_CRS, ResourceTemplate()
+	{
 			IRQ (Edge, ActiveHigh, Exclusive) { 11 }
 			Memory32Fixed (ReadWrite, 0xFEDC8000, 0x2000)
 	})
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 			Return (0x0F)
 	}
 }
@@ -68,12 +79,14 @@ Device(FUR1) {
 Device (I2CA) {
 	Name (_HID, "AMD0010")
 	Name (_UID, 0x0)
-	Name(_CRS, ResourceTemplate() {
+	Name (_CRS, ResourceTemplate()
+	{
 		IRQ (Edge, ActiveHigh, Exclusive) { 3 }
 		Memory32Fixed (ReadWrite, 0xFEDC2000, 0x1000)
 	})
 
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 		Return (0x0F)
 	}
 }
@@ -82,11 +95,13 @@ Device(I2CB)
 {
 	Name (_HID, "AMD0010")
 	Name (_UID, 0x1)
-	Name(_CRS, ResourceTemplate() {
+	Name (_CRS, ResourceTemplate()
+	{
 		IRQ (Edge, ActiveHigh, Exclusive) { 15 }
 		Memory32Fixed (ReadWrite, 0xFEDC3000, 0x1000)
 	})
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 		Return (0x0F)
 	}
 }
@@ -94,12 +109,14 @@ Device(I2CB)
 Device (I2CC) {
 	Name (_HID, "AMD0010")
 	Name (_UID, 0x0)
-	Name(_CRS, ResourceTemplate() {
+	Name (_CRS, ResourceTemplate()
+	{
 		IRQ (Edge, ActiveHigh, Exclusive) { 6 }
 		Memory32Fixed (ReadWrite, 0xFEDC4000, 0x1000)
 	})
 
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 		Return (0x0F)
 	}
 }
@@ -112,7 +129,8 @@ Device(I2CD)
 		IRQ (Edge, ActiveHigh, Exclusive) { 14 }
 		Memory32Fixed(ReadWrite, 0xFEDC5000, 0x1000)
 	})
-	Method (_STA, 0x0, NotSerialized) {
+	Method (_STA, 0x0, NotSerialized)
+	{
 		Return (0x0F)
 	}
 }

src/mainboard/google/kahlee/acpi/gpe.asl

@@ -13,27 +13,31 @@
  * GNU General Public License for more details.
  */
 
-Scope(\_GPE) {	/* Start Scope GPE */
+Scope (\_GPE)
-
+{
 	/*  General event 3  */
-	Method(_L03) {
+	Method (_L03)
+	{
 		/* DBGO ("\\_GPE\\_L00\n") */
 		Notify (\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
 	}
 
 	/*  Legacy PM event  */
-	Method(_L08) {
+	Method (_L08)
+	{
 		/* DBGO ("\\_GPE\\_L08\n") */
 	}
 
 	/*  Temp warning (TWarn) event  */
-	Method(_L09) {
+	Method (_L09)
+	{
 		/* DBGO ("\\_GPE\\_L09\n") */
 		/* Notify (\_TZ.TZ00, 0x80) */
 	}
 
 	/*  USB controller PME#  */
-	Method(_L0B) {
+	Method (_L0B)
+	{
 		/* DBGO ("\\_GPE\\_L0B\n") */
 		Notify (\_SB.PCI0.UOH1, 0x02)	/* NOTIFY_DEVICE_WAKE */
 		Notify (\_SB.PCI0.UOH2, 0x02)	/* NOTIFY_DEVICE_WAKE */
@@ -46,17 +50,20 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	}
 
 	/*  ExtEvent0 SCI event  */
-	Method(_L10) {
+	Method (_L10)
+	{
 		/* DBGO ("\\_GPE\\_L10\n") */
 	}
 
 	/*  ExtEvent1 SCI event  */
-	Method(_L11) {
+	Method (_L11)
+	{
 		/* DBGO ("\\_GPE\\_L11\n") */
 	}
 
 	/*  GPIO0 or GEvent8 event  */
-	Method(_L18) {
+	Method (_L18)
+	{
 		/* DBGO ("\\_GPE\\_L18\n") */
 		Notify (\_SB.PCI0.PBR4, 0x02)	/* NOTIFY_DEVICE_WAKE */
 		Notify (\_SB.PCI0.PBR5, 0x02)	/* NOTIFY_DEVICE_WAKE */
@@ -66,7 +73,8 @@ Scope(\_GPE) {	/* Start Scope GPE */
 	}
 
 	/*  Azalia SCI event  */
-	Method(_L1B) {
+	Method (_L1B)
+	{
 		/* DBGO("\\_GPE\\_L1B\n") */
 		Notify (\_SB.PCI0.AZHD, 0x02)	/* NOTIFY_DEVICE_WAKE */
 		Notify (\_SB.PWRB, 0x02)	/* NOTIFY_DEVICE_WAKE */

src/mainboard/google/kahlee/acpi/mainboard.asl

@@ -18,13 +18,19 @@ Name(LOMH, 0x0)	/* Start of unused memory in C0000-E0000 range */
 Name (PBAD, 0x0)	/* Address of BIOS area (If TOM2 != 0, Addr >> 16) */
 Name (PBLN, 0x0)	/* Length of BIOS area */
 
-Name(PCBA, CONFIG_MMCONF_BASE_ADDRESS)	/* Base address of PCIe config space */
+/* Base address of PCIe config space */
-Name(PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER)) /* Length of PCIe config space, 1MB each bus */
+Name (PCBA, CONFIG_MMCONF_BASE_ADDRESS)
-Name(HPBA, 0xFED00000)	/* Base address of HPET table */
 
-Name(SSFG, 0x0D)		/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
+/* Length of PCIe config space, 1MB each bus */
+Name (PCLN, Multiply(0x100000, CONFIG_MMCONF_BUS_NUMBER))
 
-/* Some global data */
+/* Base address of HPET table */
-Name(OSVR, 3)	/* Assume nothing. WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
+Name (HPBA, 0xFED00000)
+
+/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
+Name (SSFG, 0x0D)
+
+/* Global Data */
+Name (OSVR, 3)		/* WinXp = 1, Vista = 2, Linux = 3, WinCE = 4 */
 Name (OSV, Ones)	/* Assume nothing */
 Name (PMOD, One)	/* Assume APIC */

src/mainboard/google/kahlee/acpi/routing.asl

@@ -15,15 +15,15 @@
  */
 
 /*
-DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
+ * DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001)
-		)
+ *{
-	{
+ *	#include "routing.asl"
-		#include "routing.asl"
+ *}
-	}
  */
 
 /* Routing is in System Bus scope */
-Name(PR0, Package(){
+Name (PR0, Package()
+{
 	/* NB devices */
 	/* Bus 0, Dev 0 - F15 Host Controller */
 
@@ -59,7 +59,8 @@ Name(PR0, Package(){
 
 })
 
-Name(APR0, Package(){
+Name (APR0, Package()
+{
 	/* NB devices in APIC mode */
 	/* Bus 0, Dev 0 - F15 Host Controller */
 
@@ -94,13 +95,15 @@ Name(APR0, Package(){
 
 
 /* GPP 0 */
-Name(PS4, Package(){
+Name (PS4, Package()
+{
 	Package() { 0x0000FFFF, 0, INTA, 0 },
 	Package() { 0x0000FFFF, 1, INTB, 0 },
 	Package() { 0x0000FFFF, 2, INTC, 0 },
 	Package() { 0x0000FFFF, 3, INTD, 0 },
 })
-Name(APS4, Package(){
+Name (APS4, Package()
+{
 	/* PCIe slot - Hooked to PCIe slot 4 */
 	Package() { 0x0000FFFF, 0, 0, 24 },
 	Package() { 0x0000FFFF, 1, 0, 25 },
@@ -109,13 +112,15 @@ Name(APS4, Package(){
 })
 
 /* GPP 1 */
-Name(PS5, Package(){
+Name (PS5, Package()
+{
 	Package() { 0x0000FFFF, 0, INTB, 0 },
 	Package() { 0x0000FFFF, 1, INTC, 0 },
 	Package() { 0x0000FFFF, 2, INTD, 0 },
 	Package() { 0x0000FFFF, 3, INTA, 0 },
 })
-Name(APS5, Package(){
+Name (APS5, Package()
+{
 	Package() { 0x0000FFFF, 0, 0, 28 },
 	Package() { 0x0000FFFF, 1, 0, 29 },
 	Package() { 0x0000FFFF, 2, 0, 30 },
@@ -123,13 +128,15 @@ Name(APS5, Package(){
 })
 
 /* GPP 2 */
-Name(PS6, Package(){
+Name (PS6, Package()
+{
 	Package() { 0x0000FFFF, 0, INTC, 0 },
 	Package() { 0x0000FFFF, 1, INTD, 0 },
 	Package() { 0x0000FFFF, 2, INTA, 0 },
 	Package() { 0x0000FFFF, 3, INTB, 0 },
 })
-Name(APS6, Package(){
+Name (APS6, Package()
+{
 	Package() { 0x0000FFFF, 0, 0, 32 },
 	Package() { 0x0000FFFF, 1, 0, 33 },
 	Package() { 0x0000FFFF, 2, 0, 34 },
@@ -137,13 +144,15 @@ Name(APS6, Package(){
 })
 
 /* GPP 3 */
-Name(PS7, Package(){
+Name (PS7, Package()
+{
 	Package() { 0x0000FFFF, 0, INTD, 0 },
 	Package() { 0x0000FFFF, 1, INTA, 0 },
 	Package() { 0x0000FFFF, 2, INTB, 0 },
 	Package() { 0x0000FFFF, 3, INTC, 0 },
 })
-Name(APS7, Package(){
+Name (APS7, Package()
+{
 	Package() { 0x0000FFFF, 0, 0, 36 },
 	Package() { 0x0000FFFF, 1, 0, 37 },
 	Package() { 0x0000FFFF, 2, 0, 38 },
@@ -157,7 +166,8 @@ Name(PS8, Package(){
 	Package(){0x0000FFFF, 2, INTC, 0 },
 	Package(){0x0000FFFF, 3, INTD, 0 },
 })
-Name(APS8, Package(){
+Name (APS8, Package()
+{
 	Package() { 0x0000FFFF, 0, 0, 40 },
 	Package() { 0x0000FFFF, 1, 0, 41 },
 	Package() { 0x0000FFFF, 2, 0, 42 },

src/mainboard/google/kahlee/acpi/sleep.asl

@@ -32,7 +32,8 @@ Name(WKST,Package(){Zero, Zero})
 * the ACPI driver.  This method cannot modify the configuration or power
 * state of any device in the system.
 */
-Method(_PTS, 1) {
+Method (_PTS, 1)
+{
 	/* DBGO ("\\_PTS\n") */
 	/* DBGO ("From S0 to S") */
 	/* DBGO (Arg0) */
@@ -43,7 +44,7 @@ Method(_PTS, 1) {
 	Store (0, Index(WKST,0))
 	Store (0, Index(WKST,1))
 	Store (7, UPWS)
-} /* End Method(\_PTS) */
+}
 
 /*
  *	\_BFS OEM Back From Sleep method
@@ -54,7 +55,8 @@ Method(_PTS, 1) {
  *	Exit:
  *		-none-
  */
-Method(\_BFS, 1) {
+Method (\_BFS, 1)
+{
 	/* DBGO ("\\_BFS\n") */
 	/* DBGO ("From S") */
 	/* DBGO (Arg0) */
@@ -76,11 +78,12 @@ Method(\_BFS, 1) {
  *		Dword 2 - Power Supply state
  *			if non-zero the effective S-state the power supply entered
  */
-Method(\_WAK, 1) {
+Method (\_WAK, 1)
+{
 	/* DBGO ("\\_WAK\n") */
 	/* DBGO ("From S") */
 	/* DBGO (Arg0) */
 	/* DBGO (" to S0\n") */
 
 	Return (WKST)
-} /* End Method(\_WAK) */
+}

src/mainboard/google/kahlee/acpi/usb_oc.asl

@@ -16,11 +16,10 @@
 
 /* simple name description */
 /*
-DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001
+ * DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001)
-		)
+ * {
-	{
+ *	#include "usb.asl"
-		#include "usb.asl"
+ * }
-	}
  */
 
 /* USB overcurrent mapping pins.   */