superio/winbond/*/acpi: Convert superio.asl to ASL 2.0 syntax
Change-Id: I67e08a1099e41acb7031469069d9eddb274f7735 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45994 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS
Patrick Georgi
parent
d20d818b8c
commit
e96941d952
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@ -111,7 +111,7 @@ Device(SUPERIO_DEV) {
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/* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */
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Method (_PSC) {
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ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
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Store (IPD, Local0)
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Local0 = IPD
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EXIT_CONFIG_MODE ()
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If (Local0) { Return (3) }
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Else { Return (0) }
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@ -120,14 +120,14 @@ Device(SUPERIO_DEV) {
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/* PM: Switch to D0 by setting IPD low */
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Method (_PS0) {
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ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
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Store (Zero, IPD)
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IPD = 0
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EXIT_CONFIG_MODE ()
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}
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/* PM: Switch to D3 by setting IPD high */
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Method (_PS3) {
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ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
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Store (One, IPD)
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IPD = 1
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EXIT_CONFIG_MODE ()
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}
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@ -145,10 +145,10 @@ Device(SUPERIO_DEV) {
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#define SUPERIO_SUSL_LDN 9
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Method (SUSL, 1, Serialized) {
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ENTER_CONFIG_MODE (SUPERIO_SUSL_LDN)
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Store (SULM, Local0)
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And (Local0, 0x1f, Local0)
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Or (Local0, ShiftLeft (Arg0, 5), Local0)
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Store (Local0, SULM)
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Local0 = SULM
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Local0 &= 0x1f
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Local0 |= (Arg0 << 5)
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SULM = Local0
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EXIT_CONFIG_MODE ()
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}
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@ -80,7 +80,7 @@ IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve)
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/* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */
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Method (_PSC) {
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ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
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Store (IPD, Local0)
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Local0 = IPD
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EXIT_CONFIG_MODE ()
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If (Local0) { Return (3) }
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Else { Return (0) }
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@ -118,11 +118,11 @@ Device (FDC0)
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PNP_READ_IO(PNP_IO0, BUF0, IO0)
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/* Store xx7 range first so the value isn't overwritten
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* for below */
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Add(IO0I, 7, IO1I)
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Store(IO1I, IO1A)
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IO1I += 7
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IO1A = IO1I
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/* Store xx2 range */
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Add(IO0I, 2, IO0I)
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Store(IO0I, IO0A)
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IO0I += 2
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IO0A = IO0I
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/* End OEM BIOS deficiency */
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PNP_READ_IRQ(PNP_IRQ0, BUF0, Y08)
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PNP_READ_DMA(PNP_DMA0, BUF0, Y09)
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@ -147,11 +147,11 @@ Device (FDC0)
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CreateByteField (Arg0, 0x15, DMAV)
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ENTER_CONFIG_MODE(W83977TF_FDC)
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/* FDC base port on 8-byte boundary. */
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And (IOLO, 0xF8, PNP_IO0_LOW_BYTE)
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Store (IOHI, PNP_IO0_HIGH_BYTE)
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Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0)
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Subtract (FindSetLeftBit (DMAV), 1, PNP_DMA0)
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Store (One, PNP_DEVICE_ACTIVE)
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PNP_IO0_LOW_BYTE = IOLO & 0xF8
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PNP_IO0_HIGH_BYTE = IOHI
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PNP_IRQ0 = FindSetLeftBit (IRQW) - 1
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PNP_DMA0 = FindSetLeftBit (DMAV) - 1
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PNP_DEVICE_ACTIVE = 1
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EXIT_CONFIG_MODE()
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}
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}
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@ -165,11 +165,11 @@ Device (LPT)
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Method (_STA, 0, NotSerialized)
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{
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ENTER_CONFIG_MODE(W83977TF_PP)
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And (OPT1, 0x02, Local0)
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If (LOr (IO0H, IO0L))
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Local0 = OPT1 & 0x02
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If (IO0H || IO0L)
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{
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/* Report device not present if ECP is enabled */
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If (LEqual (Local0, 0x02))
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If (Local0 == 0x02)
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{
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EXIT_CONFIG_MODE()
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Return (0x00)
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@ -239,10 +239,10 @@ Device (LPT)
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CreateByteField (Arg0, 0x03, IOHI)
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CreateWordField (Arg0, 0x09, IRQW)
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ENTER_CONFIG_MODE(W83977TF_PP)
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Store (IOLO, PNP_IO0_LOW_BYTE)
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Store (IOHI, PNP_IO0_HIGH_BYTE)
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Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0)
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Store (One, PNP_DEVICE_ACTIVE)
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PNP_IO0_LOW_BYTE = IOLO
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PNP_IO0_HIGH_BYTE = IOHI
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PNP_IRQ0 = FindSetLeftBit (IRQW) - 1
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PNP_DEVICE_ACTIVE = 1
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EXIT_CONFIG_MODE()
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}
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}
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@ -254,10 +254,10 @@ Device (ECP)
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Method (_STA, 0, NotSerialized)
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{
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ENTER_CONFIG_MODE(W83977TF_PP)
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And (OPT1, 0x02, Local0)
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If (LOr (IO0H, IO0L))
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Local0 = OPT1 & 0x02
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If (IO0H || IO0L)
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{
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If (LEqual (Local0, 0x02))
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If (Local0 == 0x02)
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{
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If (PNP_DEVICE_ACTIVE)
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{
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@ -339,11 +339,11 @@ Device (ECP)
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CreateByteField (Arg0, 0x15, DMAC)
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ENTER_CONFIG_MODE(W83977TF_PP)
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Store (IOLO, PNP_IO0_LOW_BYTE)
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Store (IOHI, PNP_IO0_HIGH_BYTE)
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Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0)
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Subtract (FindSetLeftBit (DMAC), 1, PNP_DMA0)
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Store (One, PNP_DEVICE_ACTIVE)
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PNP_IO0_LOW_BYTE = IOLO
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PNP_IO0_HIGH_BYTE = IOHI
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PNP_IRQ0 = FindSetLeftBit (IRQW) - 1
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PNP_DMA0 = FindSetLeftBit (DMAC) - 1
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PNP_DEVICE_ACTIVE = 1
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EXIT_CONFIG_MODE()
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}
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}
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