superio/winbond/*/acpi: Convert superio.asl to ASL 2.0 syntax

Change-Id: I67e08a1099e41acb7031469069d9eddb274f7735
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45994
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Elyes HAOUAS 2020-10-04 09:33:21 +02:00 committed by Patrick Georgi
parent d20d818b8c
commit e96941d952
2 changed files with 32 additions and 32 deletions

View File

@ -111,7 +111,7 @@ Device(SUPERIO_DEV) {
/* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */ /* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */
Method (_PSC) { Method (_PSC) {
ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
Store (IPD, Local0) Local0 = IPD
EXIT_CONFIG_MODE () EXIT_CONFIG_MODE ()
If (Local0) { Return (3) } If (Local0) { Return (3) }
Else { Return (0) } Else { Return (0) }
@ -120,14 +120,14 @@ Device(SUPERIO_DEV) {
/* PM: Switch to D0 by setting IPD low */ /* PM: Switch to D0 by setting IPD low */
Method (_PS0) { Method (_PS0) {
ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
Store (Zero, IPD) IPD = 0
EXIT_CONFIG_MODE () EXIT_CONFIG_MODE ()
} }
/* PM: Switch to D3 by setting IPD high */ /* PM: Switch to D3 by setting IPD high */
Method (_PS3) { Method (_PS3) {
ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
Store (One, IPD) IPD = 1
EXIT_CONFIG_MODE () EXIT_CONFIG_MODE ()
} }
@ -145,10 +145,10 @@ Device(SUPERIO_DEV) {
#define SUPERIO_SUSL_LDN 9 #define SUPERIO_SUSL_LDN 9
Method (SUSL, 1, Serialized) { Method (SUSL, 1, Serialized) {
ENTER_CONFIG_MODE (SUPERIO_SUSL_LDN) ENTER_CONFIG_MODE (SUPERIO_SUSL_LDN)
Store (SULM, Local0) Local0 = SULM
And (Local0, 0x1f, Local0) Local0 &= 0x1f
Or (Local0, ShiftLeft (Arg0, 5), Local0) Local0 |= (Arg0 << 5)
Store (Local0, SULM) SULM = Local0
EXIT_CONFIG_MODE () EXIT_CONFIG_MODE ()
} }

View File

@ -80,7 +80,7 @@ IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve)
/* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */ /* PM: indicate IPD (Immediate Power Down) bit state as D0/D3 */
Method (_PSC) { Method (_PSC) {
ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE) ENTER_CONFIG_MODE (PNP_NO_LDN_CHANGE)
Store (IPD, Local0) Local0 = IPD
EXIT_CONFIG_MODE () EXIT_CONFIG_MODE ()
If (Local0) { Return (3) } If (Local0) { Return (3) }
Else { Return (0) } Else { Return (0) }
@ -118,11 +118,11 @@ Device (FDC0)
PNP_READ_IO(PNP_IO0, BUF0, IO0) PNP_READ_IO(PNP_IO0, BUF0, IO0)
/* Store xx7 range first so the value isn't overwritten /* Store xx7 range first so the value isn't overwritten
* for below */ * for below */
Add(IO0I, 7, IO1I) IO1I += 7
Store(IO1I, IO1A) IO1A = IO1I
/* Store xx2 range */ /* Store xx2 range */
Add(IO0I, 2, IO0I) IO0I += 2
Store(IO0I, IO0A) IO0A = IO0I
/* End OEM BIOS deficiency */ /* End OEM BIOS deficiency */
PNP_READ_IRQ(PNP_IRQ0, BUF0, Y08) PNP_READ_IRQ(PNP_IRQ0, BUF0, Y08)
PNP_READ_DMA(PNP_DMA0, BUF0, Y09) PNP_READ_DMA(PNP_DMA0, BUF0, Y09)
@ -147,11 +147,11 @@ Device (FDC0)
CreateByteField (Arg0, 0x15, DMAV) CreateByteField (Arg0, 0x15, DMAV)
ENTER_CONFIG_MODE(W83977TF_FDC) ENTER_CONFIG_MODE(W83977TF_FDC)
/* FDC base port on 8-byte boundary. */ /* FDC base port on 8-byte boundary. */
And (IOLO, 0xF8, PNP_IO0_LOW_BYTE) PNP_IO0_LOW_BYTE = IOLO & 0xF8
Store (IOHI, PNP_IO0_HIGH_BYTE) PNP_IO0_HIGH_BYTE = IOHI
Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0) PNP_IRQ0 = FindSetLeftBit (IRQW) - 1
Subtract (FindSetLeftBit (DMAV), 1, PNP_DMA0) PNP_DMA0 = FindSetLeftBit (DMAV) - 1
Store (One, PNP_DEVICE_ACTIVE) PNP_DEVICE_ACTIVE = 1
EXIT_CONFIG_MODE() EXIT_CONFIG_MODE()
} }
} }
@ -165,11 +165,11 @@ Device (LPT)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
ENTER_CONFIG_MODE(W83977TF_PP) ENTER_CONFIG_MODE(W83977TF_PP)
And (OPT1, 0x02, Local0) Local0 = OPT1 & 0x02
If (LOr (IO0H, IO0L)) If (IO0H || IO0L)
{ {
/* Report device not present if ECP is enabled */ /* Report device not present if ECP is enabled */
If (LEqual (Local0, 0x02)) If (Local0 == 0x02)
{ {
EXIT_CONFIG_MODE() EXIT_CONFIG_MODE()
Return (0x00) Return (0x00)
@ -239,10 +239,10 @@ Device (LPT)
CreateByteField (Arg0, 0x03, IOHI) CreateByteField (Arg0, 0x03, IOHI)
CreateWordField (Arg0, 0x09, IRQW) CreateWordField (Arg0, 0x09, IRQW)
ENTER_CONFIG_MODE(W83977TF_PP) ENTER_CONFIG_MODE(W83977TF_PP)
Store (IOLO, PNP_IO0_LOW_BYTE) PNP_IO0_LOW_BYTE = IOLO
Store (IOHI, PNP_IO0_HIGH_BYTE) PNP_IO0_HIGH_BYTE = IOHI
Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0) PNP_IRQ0 = FindSetLeftBit (IRQW) - 1
Store (One, PNP_DEVICE_ACTIVE) PNP_DEVICE_ACTIVE = 1
EXIT_CONFIG_MODE() EXIT_CONFIG_MODE()
} }
} }
@ -254,10 +254,10 @@ Device (ECP)
Method (_STA, 0, NotSerialized) Method (_STA, 0, NotSerialized)
{ {
ENTER_CONFIG_MODE(W83977TF_PP) ENTER_CONFIG_MODE(W83977TF_PP)
And (OPT1, 0x02, Local0) Local0 = OPT1 & 0x02
If (LOr (IO0H, IO0L)) If (IO0H || IO0L)
{ {
If (LEqual (Local0, 0x02)) If (Local0 == 0x02)
{ {
If (PNP_DEVICE_ACTIVE) If (PNP_DEVICE_ACTIVE)
{ {
@ -339,11 +339,11 @@ Device (ECP)
CreateByteField (Arg0, 0x15, DMAC) CreateByteField (Arg0, 0x15, DMAC)
ENTER_CONFIG_MODE(W83977TF_PP) ENTER_CONFIG_MODE(W83977TF_PP)
Store (IOLO, PNP_IO0_LOW_BYTE) PNP_IO0_LOW_BYTE = IOLO
Store (IOHI, PNP_IO0_HIGH_BYTE) PNP_IO0_HIGH_BYTE = IOHI
Subtract (FindSetLeftBit (IRQW), 1, PNP_IRQ0) PNP_IRQ0 = FindSetLeftBit (IRQW) - 1
Subtract (FindSetLeftBit (DMAC), 1, PNP_DMA0) PNP_DMA0 = FindSetLeftBit (DMAC) - 1
Store (One, PNP_DEVICE_ACTIVE) PNP_DEVICE_ACTIVE = 1
EXIT_CONFIG_MODE() EXIT_CONFIG_MODE()
} }
} }