drivers/net/r8168: Add driver for realtek nic
One thing that is vital to this patch is the MAC address setting in case the EEPROM/efuse is unconfigured. Linux now recognises the default MAC address on GA-G41M-ES2L which does rely on the default bios settings for the MAC address. Change-Id: I32e070b545b4c6369686a7087b7ff838d00764e3 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/14927 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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config REALTEK_8168_RESET
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bool "Realtek 8168 reset"
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help
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This forces a realtek 10ec:8168 card to reset to ensure power state
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is correct at boot.
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romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
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ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c
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ramstage-$(CONFIG_REALTEK_8168_RESET) += r8168.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2016 Damien Zammit <damien@zamaudio.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* This driver forces the 10ec:8168 device to reset so that it goes
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* into a proper power state, also programs a default MAC address
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* so that if the EEPROM/efuse is unconfigured it still has a default MAC.
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*/
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#include <arch/io.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <device/pci_def.h>
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#include <delay.h>
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#include <console/console.h>
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#define NIC_TIMEOUT 1000
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#define CMD_REG 0x37
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#define CMD_REG_RESET 0x10
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#define CFG_9346 0x50
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#define CFG_9346_LOCK 0x00
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#define CFG_9346_UNLOCK 0xc0
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static void r8168_init(struct device *dev)
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{
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u32 i;
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const u8 mac[6] = { 0x00, 0xe0, 0x4c, 0x00, 0xc0, 0xb0 };
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/* Get the resource of the NIC mmio */
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struct resource *nic_res = find_resource(dev, PCI_BASE_ADDRESS_0);
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u16 nic_port = (u16)nic_res->base;
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/* Set bus master */
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pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER
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| PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
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/* Reset NIC */
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printk(BIOS_DEBUG, "r8168: Resetting NIC...");
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outb(CMD_REG_RESET, nic_port + CMD_REG);
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i = 0;
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/* Poll for reset, with 1s timeout */
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while (i < NIC_TIMEOUT && (inb(nic_port + CMD_REG) & CMD_REG_RESET)) {
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udelay(1000);
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if (++i >= NIC_TIMEOUT)
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printk(BIOS_DEBUG, "timeout waiting for nic to reset\n");
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}
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if (i < NIC_TIMEOUT)
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printk(BIOS_DEBUG, "done\n");
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/* Unlock config regs */
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outb(CFG_9346_UNLOCK, nic_port + CFG_9346);
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/* Set MAC address 00:e0:4c:00:c0:b0
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* NB: only 4-byte write accesses allowed
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*/
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outl(mac[4] | mac[5] << 8, nic_port + 4);
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inl(nic_port + 4);
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outl(mac[0] | mac[1] << 8 | mac[2] << 16 | mac[3] << 24, nic_port);
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inl(nic_port);
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/* Lock config regs */
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outb(CFG_9346_LOCK, nic_port + CFG_9346);
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}
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static struct device_operations r8168_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = r8168_init,
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.scan_bus = 0,
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};
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static const struct pci_driver r8168_driver __pci_driver = {
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.ops = &r8168_ops,
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.vendor = 0x10ec,
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.device = 0x8168,
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};
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