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soc/intel/cannonlake: Add Cannonlake D0 support in mpinit and report 

Both early platform information reporting in bootblock and common code
CPU driver will add support for cannonlake D0 stepping processor.

BUG=None
TEST=Boot up system with D0 stepping CPU installed, check serial log
that can display as D0 stepping.

Change-Id: I76ee974ee027100d7853a110f95b1601987492e4
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/23350
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lijian Zhao 2018-01-21 21:05:54 -08:00 committed by Martin Roth
parent 92b487dd4b
commit e98722856e
2 changed files with 2 additions and 0 deletions
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1
src/soc/intel/cannonlake/bootblock/report_platform.c
View File

@ -35,6 +35,7 @@ static struct {
{ CPUID_CANNONLAKE_A0, "Cannonlake A0" },
{ CPUID_CANNONLAKE_B0, "Cannonlake B0" },
{ CPUID_CANNONLAKE_C0, "Cannonlake C0" },
{ CPUID_CANNONLAKE_D0, "Cannonlake D0" },
};
static struct {

1
src/soc/intel/common/block/cpu/mp_init.c
View File

@ -63,6 +63,7 @@ static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_CANNONLAKE_A0 },
{ X86_VENDOR_INTEL, CPUID_CANNONLAKE_B0 },
{ X86_VENDOR_INTEL, CPUID_CANNONLAKE_C0 },
{ X86_VENDOR_INTEL, CPUID_CANNONLAKE_D0 },
{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_A0 },
{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_B0 },
{ X86_VENDOR_INTEL, CPUID_APOLLOLAKE_E0 },