From e98dd0aad81723c9c428e43fc396f0f413cc5a4c Mon Sep 17 00:00:00 2001 From: Lean Sheng Tan Date: Mon, 12 Sep 2022 15:26:43 +0200 Subject: [PATCH] mb/prodrive/atlas: Enable GPP_B14 buzzer support Per Intel doc 621483, 26.1.1 - NMI_STS_CNT, 8254 timer is required for Speaker Data output (buzzer) at GPP_B14 NF1, as it is using 8254 timer counter 2 output. However when 8254 timer is used, S0ix will not work as 8254 has to be gated instead. For further info on s0ix requirements, refer to Intel doc 610002 (Modern Standby Unified Checklist). This CL also disables s0ix because it is not required by the platform. Signed-off-by: Lean Sheng Tan Change-Id: Ib5e7787a47509ed09818d8515d21a80196fb1ec6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67553 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/prodrive/atlas/Kconfig | 9 +++++++++ src/mainboard/prodrive/atlas/devicetree.cb | 3 +++ 2 files changed, 12 insertions(+) diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig index 814c1e057c..3900f4db15 100644 --- a/src/mainboard/prodrive/atlas/Kconfig +++ b/src/mainboard/prodrive/atlas/Kconfig @@ -54,6 +54,15 @@ config CBFS_SIZE config NO_POST default y +config ENABLE_BUZZER_SUPPORT + bool "Enable Buzzer support" + default y + select USE_LEGACY_8254_TIMER + help + 8254 timer is required for buzzer support on GPP_B14 (based on Intel doc 621483, + 26.1.1 - NMI_STS_CNT). However since 8254 timer clock gating has to be enabled for + S0ix support, enabling buzzer will disable s0ix. + config PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS int default 32 diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb index 0d91bb63bc..c90c69c4f6 100644 --- a/src/mainboard/prodrive/atlas/devicetree.cb +++ b/src/mainboard/prodrive/atlas/devicetree.cb @@ -17,6 +17,9 @@ chip soc/intel/alderlake # SaGv Configuration register "sagv" = "CONFIG(ATLAS_ENABLE_SAGV) ? SaGv_Enabled : SaGv_Disabled" + # Disable S0ix + register "s0ix_enable" = "0" + # Display configuration (4 DPs) register "ddi_ports_config" = "{ [DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,