rush: Add and select DO_SOR_INIT config option

Select DO_SOR_INIT to enable dp display api

BUG=chrome-os-partner:34336
BRANCH=none
TEST=build rush

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>

Change-Id: Iddf19195722856865a7c06ce96492012ab729184
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 31492f51c030aeb7a3ac792a02665642ec999405
Original-Change-Id: I4daca43239235ca6d233c4457096d3b98fcaf65c
Original-Reviewed-on: https://chromium-review.googlesource.com/234274
Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-on: http://review.coreboot.org/9586
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/mainboard/google/rush/Kconfig

@@ -25,8 +25,10 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select EC_GOOGLE_CHROMEEC
 	select EC_GOOGLE_CHROMEEC_SPI
 	select EC_SOFTWARE_SYNC
+	select MAINBOARD_DO_NATIVE_VGA_INIT
 	select SPI_FLASH
 	select SOC_NVIDIA_TEGRA132
+	select MAINBOARD_DO_SOR_INIT
 	select MAINBOARD_HAS_BOOTBLOCK_INIT
 	select VIRTUAL_DEV_SWITCH
 	select BOARD_ROMSIZE_KB_4096

src/mainboard/google/rush/mainboard.c

@@ -29,6 +29,8 @@
 #include <soc/nvidia/tegra/usb.h>
 #include <soc/padconfig.h>
 #include <soc/spi.h>
+#include <soc/nvidia/tegra/dc.h>
+#include <soc/display.h>
 
 static const struct pad_config sdmmc3_pad[] = {
 	/* MMC3(SDCARD) */
@@ -146,6 +148,11 @@ static void mainboard_init(device_t dev)
 	i2c_init(I2C1_BUS);		/* for max98090 codec */
 }
 
+void display_startup(device_t dev)
+{
+	dp_display_startup(dev);
+}
+
 static void mainboard_enable(device_t dev)
 {
 	dev->ops->init = &mainboard_init;

src/soc/nvidia/tegra132/Kconfig

@@ -27,6 +27,13 @@ config MAINBOARD_DO_DSI_INIT
 	help
 	  Initialize dsi display
 
+config MAINBOARD_DO_SOR_INIT
+	bool "Use dp graphics interface"
+	depends on MAINBOARD_DO_NATIVE_VGA_INIT
+	default n
+	help
+	  Initialize dp display
+
 config BOOTBLOCK_CPU_INIT
 	string
 	default "soc/nvidia/tegra132/bootblock.c"

src/soc/nvidia/tegra132/Makefile.inc

@@ -72,6 +72,7 @@ ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi_dsi.c
 ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi.c
 ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += mipi-phy.c
 ramstage-$(CONFIG_MAINBOARD_DO_DSI_INIT) += ./jdi_25x18_display/panel-jdi-lpm102a188a.c
+ramstage-$(CONFIG_MAINBOARD_DO_SOR_INIT) += dp.c
 
 ramstage-y += soc.c
 ramstage-y += spi.c

src/soc/nvidia/tegra132/dp.c

@@ -0,0 +1,34 @@
+/*
+ * drivers/video/tegra/dc/dp.c
+ *
+ * Copyright (c) 2011-2013, NVIDIA Corporation.
+ * Copyright 2014 Google Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <soc/display.h>
+#include <soc/nvidia/tegra/dc.h>
+#include <stdlib.h>
+
+#include "chip.h"
+
+void dp_display_startup(device_t dev)
+{
+	struct soc_nvidia_tegra132_config *config = dev->chip_info;
+	struct display_controller *disp_ctrl =
+			(void *)config->display_controller;
+
+	printk(BIOS_INFO, "%s: entry: disp_ctrl: %p.\n",
+		 __func__, disp_ctrl);
+}

src/soc/nvidia/tegra132/include/soc/display.h

@@ -39,6 +39,7 @@ struct soc_nvidia_tegra132_config;
 struct display_controller;
 
 void dsi_display_startup(device_t dev);
+void dp_display_startup(device_t dev);
 
 int tegra_dc_init(struct display_controller *disp_ctrl);
 int update_display_mode(struct display_controller *disp_ctrl,