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intel/haswell: Remove useless MTRR clear 

At this state, variable MTRRs are disabled. We overwrite this MTRR entry
before they are re-enabled.

Change-Id: Ieedf90f65514d848905626e75be496e08f710d91
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15794
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki 2016-07-22 00:01:33 +03:00
parent 3f22abb0a7
commit e9a9c6a33c
1 changed files with 0 additions and 8 deletions
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8
src/cpu/intel/haswell/cache_as_ram.inc
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@ -209,14 +209,6 @@ before_romstage:
andl $~1, %eax
wrmsr
/* Clear MTRR that was used to cache MRC */
xorl %eax, %eax
xorl %edx, %edx
movl $MTRR_PHYS_BASE(2), %ecx
wrmsr
movl $MTRR_PHYS_MASK(2), %ecx
wrmsr
post_code(0x33)
/* Enable cache. */