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soc/intel: Drop SoC specific DPTF implementation 

This patch drops the SoC specific implementation as DPTF driver can
now fillin those platform specific data using SoC specific macros.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: If65976f15374ba2410b537b1646ce466ba02969b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71112
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
This commit is contained in:
Subrata Banik 2022-12-19 23:14:35 +05:30 committed by Felix Held
parent af20628a48
commit e9ac9f97e8
11 changed files with 0 additions and 123 deletions
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6
src/drivers/intel/dptf/dptf.h
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@ -28,10 +28,4 @@ struct dptf_platform_info {
} tpch_method_names;
};
/*
* `soc_get_dptf_platform_info()` is a callback into the SoC directory
* to fill in the `struct dptf_platform_info` data structure.
*/
const struct dptf_platform_info *soc_get_dptf_platform_info(void);
#endif /* _DRIVERS_INTEL_DPTF_H_ */

1
src/soc/intel/alderlake/Makefile.inc
View File

@ -27,7 +27,6 @@ romstage-y += cpu.c
ramstage-y += acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += dptf.c
ramstage-y += elog.c
ramstage-y += espi.c
ramstage-y += finalize.c

35
src/soc/intel/alderlake/dptf.c
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@ -1,35 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/dptf/dptf.h>
#include <soc/dptf.h>
static const struct dptf_platform_info adl_dptf_platform_info = {
.use_eisa_hids = CONFIG(DPTF_USE_EISA_HID),
/* _HID for the toplevel DPTF device, typically \_SB.DPTF */
.dptf_device_hid = DPTF_DPTF_DEVICE,
/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
.generic_hid = DPTF_GEN_DEVICE,
/* _HID for Intel DPTF Fan Device */
.fan_hid = DPTF_FAN_DEVICE,
/* _HID for the toplevel TPCH device, typically \_SB.TPCH */
.tpch_device_hid = DPTF_TPCH_DEVICE,
/* _HID for the toplevel TPWR device, typically \_SB.DPTF.TPWR */
.tpwr_device_hid = DPTF_TPWR_DEVICE,
/* _HID for the toplevel BAT1 device, typically \_SB.DPTF.BAT1 */
.tbat_device_hid = DPTF_BAT1_DEVICE,
.tpch_method_names = {
.set_fivr_low_clock_method = "RFC0",
.set_fivr_high_clock_method = "RFC1",
.get_fivr_low_clock_method = "GFC0",
.get_fivr_high_clock_method = "GFC1",
.get_fivr_ssc_method = "GEMI",
.get_fivr_switching_fault_status = "GFFS",
.get_fivr_switching_freq_mhz = "GFCS",
},
};
const struct dptf_platform_info *soc_get_dptf_platform_info(void)
{
return &adl_dptf_platform_info;
}

1
src/soc/intel/apollolake/Makefile.inc
View File

@ -49,7 +49,6 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-y += cpu.c
ramstage-y += chip.c
ramstage-y += cse.c
ramstage-y += dptf.c
ramstage-y += elog.c
ramstage-y += graphics.c
ramstage-y += gspi.c

19
src/soc/intel/apollolake/dptf.c
View File

@ -1,19 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/dptf/dptf.h>
#include <soc/dptf.h>
static const struct dptf_platform_info apl_dptf_platform_info = {
.use_eisa_hids = CONFIG(DPTF_USE_EISA_HID),
/* _HID for the toplevel DPTF device, typically \_SB.DPTF */
.dptf_device_hid = DPTF_DPTF_DEVICE,
/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
.generic_hid = DPTF_GEN_DEVICE,
/* _HID for Intel DPTF Fan Device */
.fan_hid = DPTF_FAN_DEVICE,
};
const struct dptf_platform_info *soc_get_dptf_platform_info(void)
{
return &apl_dptf_platform_info;
}

1
src/soc/intel/cannonlake/Makefile.inc
View File

@ -29,7 +29,6 @@ romstage-y += uart.c
ramstage-y += acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += dptf.c
ramstage-y += elog.c
ramstage-y += finalize.c
ramstage-y += fsp_params.c

19
src/soc/intel/cannonlake/dptf.c
View File

@ -1,19 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/dptf/dptf.h>
#include <soc/dptf.h>
static const struct dptf_platform_info cnl_dptf_platform_info = {
.use_eisa_hids = CONFIG(DPTF_USE_EISA_HID),
/* _HID for the toplevel DPTF device, typically \_SB.DPTF */
.dptf_device_hid = DPTF_DPTF_DEVICE,
/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
.generic_hid = DPTF_GEN_DEVICE,
/* _HID for Intel DPTF Fan Device */
.fan_hid = DPTF_FAN_DEVICE,
};
const struct dptf_platform_info *soc_get_dptf_platform_info(void)
{
return &cnl_dptf_platform_info;
}

1
src/soc/intel/jasperlake/Makefile.inc
View File

@ -27,7 +27,6 @@ romstage-y += reset.c
ramstage-y += acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += dptf.c
ramstage-y += elog.c
ramstage-y += espi.c
ramstage-y += finalize.c

19
src/soc/intel/jasperlake/dptf.c
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@ -1,19 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/dptf/dptf.h>
#include <soc/dptf.h>
static const struct dptf_platform_info jsl_dptf_platform_info = {
.use_eisa_hids = CONFIG(DPTF_USE_EISA_HID),
/* _HID for the toplevel DPTF device, typically \_SB.DPTF */
.dptf_device_hid = DPTF_DPTF_DEVICE,
/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
.generic_hid = DPTF_GEN_DEVICE,
/* _HID for Intel DPTF Fan Device */
.fan_hid = DPTF_FAN_DEVICE,
};
const struct dptf_platform_info *soc_get_dptf_platform_info(void)
{
return &jsl_dptf_platform_info;
}

1
src/soc/intel/tigerlake/Makefile.inc
View File

@ -25,7 +25,6 @@ romstage-y += reset.c
ramstage-y += acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += dptf.c
ramstage-y += elog.c
ramstage-y += espi.c
ramstage-y += finalize.c

20
src/soc/intel/tigerlake/dptf.c
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@ -1,20 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <drivers/intel/dptf/dptf.h>
#include <soc/dptf.h>
#include <stdbool.h>
static const struct dptf_platform_info tgl_dptf_platform_info = {
.use_eisa_hids = CONFIG(DPTF_USE_EISA_HID),
/* _HID for the toplevel DPTF device, typically \_SB.DPTF */
.dptf_device_hid = DPTF_DPTF_DEVICE,
/* _HID for Intel DPTF Generic Device (these require PTYP as well) */
.generic_hid = DPTF_GEN_DEVICE,
/* _HID for Intel DPTF Fan Device */
.fan_hid = DPTF_FAN_DEVICE,
};
const struct dptf_platform_info *soc_get_dptf_platform_info(void)
{
return &tgl_dptf_platform_info;
}