google/panther: Configure USB_ILIM_SEL to low
(panther port of Ib980100c648ae7472eac6f97e47f8ef3cbe72c7e) BUG=none BRANCH=none TEST=boot tested on Panther Change-Id: Iedcc107a43be170762d42d515c7e2a16ec395452 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/177474 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Commit-Queue: Mohammed Habibulla <moch@google.com> Tested-by: Mohammed Habibulla <moch@google.com> Reviewed-on: http://review.coreboot.org/5995 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -51,7 +51,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
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LP_GPIO_UNUSED, /* 25: UNUSED */
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LP_GPIO_UNUSED, /* 25: UNUSED */
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LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */
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LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */
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LP_GPIO_UNUSED, /* 27: UNUSED */
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LP_GPIO_UNUSED, /* 27: UNUSED */
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LP_GPIO_OUT_HIGH, /* 28: USB_ILIM_SEL */
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LP_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */
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LP_GPIO_UNUSED, /* 29: UNUSED */
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LP_GPIO_UNUSED, /* 29: UNUSED */
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LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */
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LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */
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LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */
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LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */
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