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Revert "sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register" 

This reverts commit 04506e2987.

Turned out that `dev->command` is only a `u8` and the way it's used
here is wrong: It is not supposed to reflect the state of the register
but only gathers (lower) bits to be enabled during allocation.

Change-Id: Iacd2b753939e8adcf5aedd4b9cf101638a324aa6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42163
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber 2020-06-07 15:54:32 +00:00 committed by Patrick Georgi
parent 45aea0b1d0
commit e9e13d41e9
1 changed files with 1 additions and 1 deletions
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2
src/southbridge/amd/cimx/sb800/late.c
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@ -98,7 +98,7 @@ static void ahci_raid_init(struct device *dev)
}
dev->command |= PCI_COMMAND_MASTER;
pci_write_config16(dev, PCI_COMMAND, dev->command);
pci_write_config8(dev, PCI_COMMAND, dev->command);
printk(BIOS_DEBUG, "AHCI/RAID controller initialized\n");
}