soc/intel/common/block/gspi: Set Clock Update Bit for clock updates.

This is required for clock parameter settings to take effect.

BUG=b:75306520
BRANCH=None
TEST=On Octopus, used a scope to check that spi_clk fed to tpm is
1 MHz

Change-Id: Icdb617aa4aa944d46b3a56dab88d2008b01dea0d
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://review.coreboot.org/25573
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/common/block/gspi/gspi.c

@@ -465,7 +465,8 @@ static int gspi_ctrlr_setup(const struct spi_slave *dev)
 	 * Program m/n divider.
 	 * Set m and n to 1, so that this divider acts as a pass-through.
 	 */
-	clocks = (1 << CLOCKS_N_SHIFT) | (1 << CLOCKS_M_SHIFT) | CLOCKS_ENABLE;
+	clocks = (1 << CLOCKS_N_SHIFT) | (1 << CLOCKS_M_SHIFT) | CLOCKS_ENABLE |
+		 CLOCKS_UPDATE;
 	gspi_write_mmio_reg(p, CLOCKS, clocks);
 	udelay(10);