mb/google/dedede: Add weak pull-up for EC_AP_PWR_BTN_ODL gpio
According to the EDS, EC_AP_PWR_BTN_ODL has a default internal pull-up of 20K. Retain it during the GPIO pad configuration. BUG=b:150985246 TEST=Boot the mainboard. Change-Id: I042ba70f78fca1a5b9eda30029df97b3f8e65656 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39852 Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -372,7 +372,7 @@ static const struct pad_config gpio_table[] = {
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/* GPD2 : EC_AP_WAKE_ODL */
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/* GPD2 : EC_AP_WAKE_ODL */
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PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD2, NONE, DEEP, NF1),
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/* GPD3 : EC_AP_PWR_BTN_ODL */
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/* GPD3 : EC_AP_PWR_BTN_ODL */
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PAD_CFG_NF(GPD3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1),
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/* GPD4 : AP_SLP_S3_L */
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/* GPD4 : AP_SLP_S3_L */
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PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPD4, NONE, DEEP, NF1),
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/* GPD5 : AP_SLP_S4_L */
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/* GPD5 : AP_SLP_S4_L */
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