soc/intel: Constify `soc_get_cstate_map()`

Return a read-only pointer from the `soc_get_cstate_map()` function.
Also, constify the actual data where applicable.

Change-Id: I7d46f1e373971c789eaf1eb582e9aa2d3f661785
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58392
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Angel Pons 2021-10-17 13:28:23 +02:00 committed by Felix Held
parent d2794cea12
commit e9f10ff38b
11 changed files with 13 additions and 13 deletions

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@ -111,7 +111,7 @@ static int cstate_set_s0ix[] = {
C_STATE_C10 C_STATE_C10
}; };
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix), static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix),
ARRAY_SIZE(cstate_set_non_s0ix))]; ARRAY_SIZE(cstate_set_non_s0ix))];

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@ -30,7 +30,7 @@
.addrl = address, \ .addrl = address, \
} }
static acpi_cstate_t cstate_map[] = { static const acpi_cstate_t cstate_map[] = {
{ {
/* C1 */ /* C1 */
.ctype = 1, /* ACPI C1 */ .ctype = 1, /* ACPI C1 */
@ -62,7 +62,7 @@ void soc_write_sci_irq_select(uint32_t scis)
write32p(soc_read_pmc_base() + IRQ_REG, scis); write32p(soc_read_pmc_base() + IRQ_REG, scis);
} }
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
*entries = ARRAY_SIZE(cstate_map); *entries = ARRAY_SIZE(cstate_map);
return cstate_map; return cstate_map;

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@ -111,7 +111,7 @@ static int cstate_set_s0ix[] = {
C_STATE_C10 C_STATE_C10
}; };
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix), static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix),
ARRAY_SIZE(cstate_set_non_s0ix))]; ARRAY_SIZE(cstate_set_non_s0ix))];

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@ -248,7 +248,7 @@ int common_calculate_power_ratio(int tdp, int p1_ratio, int ratio)
static void generate_c_state_entries(void) static void generate_c_state_entries(void)
{ {
acpi_cstate_t *c_state_map; const acpi_cstate_t *c_state_map;
size_t entries; size_t entries;
c_state_map = soc_get_cstate_map(&entries); c_state_map = soc_get_cstate_map(&entries);

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@ -38,7 +38,7 @@ void soc_write_sci_irq_select(uint32_t scis);
* get_cstate_map returns a table of processor specific acpi_cstate_t entries * get_cstate_map returns a table of processor specific acpi_cstate_t entries
* and number of entries in the table * and number of entries in the table
*/ */
acpi_cstate_t *soc_get_cstate_map(size_t *num_entries); const acpi_cstate_t *soc_get_cstate_map(size_t *num_entries);
/* /*
* get_tstate_map returns a table of processor specific acpi_tstate_t entries * get_tstate_map returns a table of processor specific acpi_tstate_t entries

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@ -27,7 +27,7 @@
.addrl = address, \ .addrl = address, \
} }
static acpi_cstate_t cstate_map[] = { static const acpi_cstate_t cstate_map[] = {
{ {
/* C1 */ /* C1 */
.ctype = 1, /* ACPI C1 */ .ctype = 1, /* ACPI C1 */
@ -75,7 +75,7 @@ uint32_t soc_read_sci_irq_select(void)
return pci_read_config32(dev, PMC_ACPI_CNT); return pci_read_config32(dev, PMC_ACPI_CNT);
} }
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
*entries = ARRAY_SIZE(cstate_map); *entries = ARRAY_SIZE(cstate_map);
return cstate_map; return cstate_map;

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@ -110,7 +110,7 @@ static int cstate_set_s0ix[] = {
C_STATE_C10 C_STATE_C10
}; };
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix), static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix),
ARRAY_SIZE(cstate_set_non_s0ix))]; ARRAY_SIZE(cstate_set_non_s0ix))];

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@ -107,7 +107,7 @@ static int cstate_set_s0ix[] = {
C_STATE_C10 C_STATE_C10
}; };
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix), static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix),
ARRAY_SIZE(cstate_set_non_s0ix))]; ARRAY_SIZE(cstate_set_non_s0ix))];

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@ -110,7 +110,7 @@ static int cstate_set_s0ix[] = {
C_STATE_C10 C_STATE_C10
}; };
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix), static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix),
ARRAY_SIZE(cstate_set_non_s0ix))]; ARRAY_SIZE(cstate_set_non_s0ix))];

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@ -110,7 +110,7 @@ static int cstate_set_s0ix[] = {
C_STATE_C10 C_STATE_C10
}; };
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix), static acpi_cstate_t map[MAX(ARRAY_SIZE(cstate_set_s0ix),
ARRAY_SIZE(cstate_set_non_s0ix))]; ARRAY_SIZE(cstate_set_non_s0ix))];

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@ -58,7 +58,7 @@ static int cstate_set_c1_c6[] = {
C_STATE_C6, C_STATE_C6,
}; };
acpi_cstate_t *soc_get_cstate_map(size_t *entries) const acpi_cstate_t *soc_get_cstate_map(size_t *entries)
{ {
static acpi_cstate_t map[ARRAY_SIZE(cstate_set_all)]; static acpi_cstate_t map[ARRAY_SIZE(cstate_set_all)];
int *cstate_set; int *cstate_set;