coreboot_tables: Drop uart PCI addr

Only edk2 used this to fill in a different struct but even there the
entries go unused, so removing this struct element from coreboot has
no side effects.

Change-Id: Iadd2678c4e01d30471eac43017392d256adda341
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>

configs/config.intel_harcuvar

@@ -4,7 +4,6 @@ CONFIG_CBFS_SIZE=0x800000
 CONFIG_BOARD_INTEL_HARCUVAR=y
 # CONFIG_DRIVERS_UART_8250IO is not set
 CONFIG_ENABLE_HSUART=y
-CONFIG_UART_PCI_ADDR=0x8000d000
 
 #Sample settings for Denverton-NS FSP.
 #CONFIG_ADD_FSP_BINARIES=y

payloads/libpayload/include/coreboot_tables.h

@@ -191,14 +191,6 @@ struct cb_serial {
 	 * decisions as to which dividers to select and their values
 	 * to eventually arrive at the desired console baud-rate. */
 	u32 input_hertz;
-
-	/* UART PCI address: bus, device, function
-	 * 1 << 31 - Valid bit, PCI UART in use
-	 * Bus << 20
-	 * Device << 15
-	 * Function << 12
-	 */
-	u32 uart_pci_addr;
 };
 
 struct cb_console {

src/commonlib/include/commonlib/coreboot_tables.h

@@ -197,14 +197,6 @@ struct lb_serial {
 	 * decisions as to which dividers to select and their values
 	 * to eventually arrive at the desired console baud-rate. */
 	uint32_t input_hertz;
-
-	/* UART PCI address: bus, device, function
-	 * 1 << 31 - Valid bit, PCI UART in use
-	 * Bus << 20
-	 * Device << 15
-	 * Function << 12
-	 */
-	uint32_t uart_pci_addr;
 };
 
 struct lb_console {

src/drivers/uart/Kconfig

@@ -75,14 +75,3 @@ config UART_USE_REFCLK_AS_INPUT_CLOCK
 	default n
 	help
 	  Use uart_platform_refclk to specify the input clock value.
-
-config UART_PCI_ADDR
-	hex "UART's PCI bus, device, function address"
-	default 0x0
-	help
-	  Specify zero if the UART is connected to another bus type.
-	  For PCI based UARTs, build the value as:
-	  * 1 << 31 - Valid bit, PCI UART in use
-	  * Bus << 20
-	  * Device << 15
-	  * Function << 12

src/drivers/uart/pl011.c

@@ -43,7 +43,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/drivers/uart/uart8250io.c

@@ -114,7 +114,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data);

src/drivers/uart/uart8250mem.c

@@ -146,7 +146,6 @@ void uart_fill_lb(void *data)
 	else
 		serial.regwidth = sizeof(uint8_t);
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/lib/coreboot_table.c

@@ -109,7 +109,6 @@ void lb_add_serial(struct lb_serial *new_serial, void *data)
 	serial->baud = new_serial->baud;
 	serial->regwidth = new_serial->regwidth;
 	serial->input_hertz = new_serial->input_hertz;
-	serial->uart_pci_addr = new_serial->uart_pci_addr;
 }
 
 void lb_add_console(uint16_t consoletype, void *data)

src/mainboard/emulation/qemu-power8/uart.c

@@ -37,7 +37,6 @@ void uart_fill_lb(void *data)
 	serial.baud = 115200;
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/intel/quark/Kconfig

@@ -63,14 +63,6 @@ config TTYS0_LCS
 	default 3
 	depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1
 
-# Console: PCI UART bus 0 << 20, device 20 << 15, function x << 12
-#          Valid bit, PCI UART in use: 1 << 31
-config UART_PCI_ADDR
-	hex
-	default 0x800a1000 if ENABLE_BUILTIN_HSUART0
-	default 0x800a5000 if ENABLE_BUILTIN_HSUART1
-	depends on ENABLE_BUILTIN_HSUART0 || ENABLE_BUILTIN_HSUART1
-
 #####
 # Debug support
 #     The following options provide debug support for the Quark coreboot

src/soc/mediatek/common/uart.c

@@ -167,7 +167,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	serial.input_hertz = UART_HZ;
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/nvidia/tegra124/uart.c

@@ -122,7 +122,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/nvidia/tegra210/uart.c

@@ -109,7 +109,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/qualcomm/ipq40xx/uart.c

@@ -265,7 +265,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/qualcomm/qcs405/uart.c

@@ -266,7 +266,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 1;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/samsung/exynos5250/uart.c

@@ -140,7 +140,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/samsung/exynos5420/uart.c

@@ -131,7 +131,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 4;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = 0;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

src/soc/ti/am335x/uart.c

@@ -178,7 +178,6 @@ void uart_fill_lb(void *data)
 	serial.baud = get_uart_baudrate();
 	serial.regwidth = 2;
 	serial.input_hertz = uart_platform_refclk();
-	serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);

tests/lib/coreboot_table-test.c

@@ -127,7 +127,6 @@ static void test_lb_add_serial(void **state)
 	serial.baud = 115200;
 	serial.regwidth = 1;
 	serial.input_hertz = 115200 * 16;
-	serial.uart_pci_addr = 0x0;
 	lb_add_serial(&serial, header);
 
 	assert_int_equal(1, header->table_entries);
@@ -244,7 +243,6 @@ void uart_fill_lb(void *data)
 	serial.baud = 115200;
 	serial.regwidth = 1;
 	serial.input_hertz = 115200 * 16;
-	serial.uart_pci_addr = 0x0;
 	lb_add_serial(&serial, data);
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
@@ -419,7 +417,6 @@ static void test_write_tables(void **state)
 			assert_int_equal(115200, serial->baud);
 			assert_int_equal(1, serial->regwidth);
 			assert_int_equal(115200 * 16, serial->input_hertz);
-			assert_int_equal(0x0, serial->uart_pci_addr);
 			break;
 		case LB_TAG_CONSOLE:
 			assert_int_equal(sizeof(struct lb_console), record->size);