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soc/intel/alderlake: Disable C1E on RPL CPUs 

Since disabling C1E could improve acoustic noise for RPL, add judgement
in SOC code to disable C1E on RPL CPUs and enabling it on ADL CPUs .

BUG=b:278654939
TEST:emerge-brya coreboot

Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com>
Change-Id: Ic2d2d5d6075de25141c1d08ec18838731c63a342
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74727
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Joey Peng 2023-04-25 15:18:00 +08:00 committed by Nick Vaccaro
parent 9718e2616a
commit ea2a38be32
1 changed files with 5 additions and 0 deletions
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5
src/soc/intel/alderlake/fsp_params.c
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@ -1011,6 +1011,11 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg,
s_cfg->PkgCStateDemotion = 0;
else
s_cfg->PkgCStateDemotion = !config->disable_package_c_state_demotion;
if (cpu_id == CPUID_RAPTORLAKE_P_J0 || cpu_id == CPUID_RAPTORLAKE_P_Q0)
s_cfg->C1e = 0;
else
s_cfg->C1e = 1;
}
static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg,