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soc/intel/tigerlake: Add ACPI devices for FSPI, SRAM, HEC1 

Add ACPI devices for these components so that generated LPI constraints
for them have valid device references.

TEST=tested with rest of patch train

Change-Id: Ib70dc29f54d28ec1fe7b630ab3fab24bcdd08154
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78519
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Matt DeVillier 2023-10-21 20:38:01 -05:00 committed by Felix Held
parent 06fe0d7828
commit ea2a47667e
2 changed files with 16 additions and 0 deletions
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10
src/soc/intel/tigerlake/acpi/pcie.asl
View File

@ -475,3 +475,13 @@ Device (RP24)
} }
} }
#endif /* CONFIG(SOC_INTEL_TIGERLAKE_PCH_H) */ #endif /* CONFIG(SOC_INTEL_TIGERLAKE_PCH_H) */
Device (SRAM)
{
Name (_ADR, 0x00140002)
}
Device (HEC1)
{
Name (_ADR, 0x00160000)
}

6
src/soc/intel/tigerlake/acpi/serialio.asl
View File

@ -79,3 +79,9 @@ Device (UAR2)
Name (_ADR, 0x00190002) Name (_ADR, 0x00190002)
Name (_DDN, "Serial IO UART Controller 2") Name (_DDN, "Serial IO UART Controller 2")
} }
Device (FSPI)
{
Name (_ADR, 0x001f0005)
Name (_DDN, "Fast SPI")
}