soc/amd/genoa: Implement romstage

The only thing romstage needs to do is find cbmem_top.

TESTED: reaches ramstage.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ic2837c4a2b0ec8dcd9dd99602f9c073999c36139
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76514
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
This commit is contained in:
Arthur Heymans 2023-07-13 18:32:40 +02:00 committed by Felix Held
parent 98a46fb2dd
commit ea2e210548
1 changed files with 9 additions and 3 deletions

View File

@ -1,10 +1,16 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/post_codes.h>
#include <amdblocks/memmap.h>
#include <cbmem.h>
#include <program_loading.h>
#include <romstage_common.h>
#include <halt.h>
void __noreturn romstage_main(void)
{
/* Needed for __noreturn */
halt();
post_code(POSTCODE_ROMSTAGE_MAIN);
cbmem_initialize_empty();
memmap_stash_early_dram_usage();
run_ramstage();
}