soc/amd: factor out vbnv_cmos_failed() into soc/amd/common/vboot

Change-Id: I7f976c6c5a2a715e1a5372bb93fe657d0d86c848
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47584
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/common/Makefile.inc

@@ -1 +1,4 @@
-subdirs-$(CONFIG_SOC_AMD_COMMON) += block
+ifeq ($(CONFIG_SOC_AMD_COMMON),y)
+subdirs-y += block
+subdirs-y += vboot
+endif

src/soc/amd/common/vboot/Makefile.inc

@@ -0,0 +1,6 @@
+ifeq ($(CONFIG_VBOOT_VBNV_CMOS),y)
+bootblock-y += vbnv_cmos.c
+verstage-y += vbnv_cmos.c
+romstage-y += vbnv_cmos.c
+ramstage-y += vbnv_cmos.c
+endif

src/soc/amd/picasso/Makefile.inc

@@ -23,14 +23,12 @@ bootblock-y += tsc_freq.c
 bootblock-y += gpio.c
 bootblock-y += smi_util.c
 bootblock-y += config.c
-bootblock-y += pmutil.c
 bootblock-y += reset.c
 bootblock-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += bootblock/vboot_bootblock.c
 
 romstage-y += i2c.c
 romstage-y += romstage.c
 romstage-y += gpio.c
-romstage-y += pmutil.c
 romstage-y += reset.c
 romstage-y += memmap.c
 romstage-y += uart.c
@@ -45,7 +43,6 @@ romstage-y += config.c
 romstage-y += mrc_cache.c
 
 verstage-y += i2c.c
-verstage-y += pmutil.c
 verstage-y += config.c
 verstage-y += aoac.c
 verstage_x86-y += gpio.c
@@ -66,7 +63,6 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += agesa_acpi.c
 ramstage-y += gpio.c
 ramstage-y += aoac.c
 ramstage-y += southbridge.c
-ramstage-y += pmutil.c
 ramstage-y += reset.c
 ramstage-y += acp.c
 ramstage-y += sata.c

src/soc/amd/stoneyridge/Makefile.inc

@@ -17,7 +17,6 @@ bootblock-y += gpio.c
 bootblock-y += i2c.c
 bootblock-y += enable_usbdebug.c
 bootblock-y += monotonic_timer.c
-bootblock-y += pmutil.c
 bootblock-y += tsc_freq.c
 bootblock-y += southbridge.c
 bootblock-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
@@ -28,7 +27,6 @@ romstage-y += romstage.c
 romstage-y += enable_usbdebug.c
 romstage-y += gpio.c
 romstage-y += monotonic_timer.c
-romstage-y += pmutil.c
 romstage-y += smbus_spd.c
 romstage-y += memmap.c
 romstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
@@ -40,7 +38,6 @@ romstage-y += psp.c
 verstage-y += gpio.c
 verstage-y += i2c.c
 verstage-y += monotonic_timer.c
-verstage-y += pmutil.c
 verstage-$(CONFIG_STONEYRIDGE_UART) += uart.c
 verstage-y += tsc_freq.c
 
@@ -61,7 +58,6 @@ ramstage-y += gpio.c
 ramstage-y += monotonic_timer.c
 ramstage-y += southbridge.c
 ramstage-y += northbridge.c
-ramstage-y += pmutil.c
 ramstage-y += sata.c
 ramstage-y += memmap.c
 ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c

src/soc/amd/stoneyridge/pmutil.c

@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <acpi/acpi.h>
-#include <soc/southbridge.h>
-#include <amdblocks/acpimmio.h>
-#include <security/vboot/vboot_common.h>
-#include <security/vboot/vbnv.h>
-#include <pc80/mc146818rtc.h>
-
-int vbnv_cmos_failed(void)
-{
-	/* If CMOS power has failed, the century will be set to 0xff */
-	return cmos_read(RTC_CLK_ALTCENTURY) == 0xff;
-}