max77802: update header

This adds #defines for BUCK2DVS1_1_2625V and BOOSTCTRL_OFF.

Signed-off-by: David Hendricks <dhendrix@chromium.org>

Change-Id: I363c73ff4a645da53973767fa4bfa2c120394af6
Reviewed-on: https://gerrit.chromium.org/gerrit/64303
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/4426
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
David Hendricks 2013-08-01 18:48:26 -07:00 committed by Patrick Georgi
parent 997be3d2ee
commit ea3a463460
1 changed files with 10 additions and 5 deletions

View File

@ -199,6 +199,8 @@ enum {
#define MAX77802_BUCK1DVS1_1V 0x3E
/* Buck2 1.0 volt value (P1.0V_VDD_ARM) */
#define MAX77802_BUCK2DVS1_1V 0x40
/* Buck2 1.2625 volt value (P1.2625V_VDD_ARM) */
#define MAX77802_BUCK2DVS1_1_2625V 0x6A
/* Buck3 1.0 volt value (P1.0V_VDD_INT) */
#define MAX77802_BUCK3DVS1_1V 0x40
/* Buck4 1.0 volt value (P1.0V_VDD_G3D) */
@ -222,6 +224,9 @@ enum {
#define MAX77802_LDO35CTRL1_1_2V (1 << 4)
#define MAX77802_LOD35CTRL1_ON (1 << 6)
/* Disable Boost Mode*/
#define MAX77802_BOOSTCTRL_OFF 0x09
/*
* MAX77802_REG_PMIC_32KHZ set to 32KH CP
* output is activated