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soc/mediatek/mt8183: Add udelay after setting voltages 

The SOC DRAM team suggested to delay at least 1us after setting new
voltage in PMIC wrapper so the new value can be effective.

BRANCH=kukui
BUG=b:142358843
TEST=emerge-kukui coreboot

Change-Id: I19d236769c3c0c87513ea4a0a3f64b83e3a844c2
Signed-off-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36254
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Yu-Ping Wu 2019-10-23 16:51:26 +08:00 committed by Patrick Georgi
parent 241f0a5593
commit ea4bda55d6
1 changed files with 2 additions and 0 deletions
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2
src/soc/mediatek/mt8183/mt6358.c
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@ -874,6 +874,7 @@ void pmic_set_vcore_vol(unsigned int vcore_uv)
pwrap_write_field(PMIC_VCORE_OP_EN, 1, 0x7F, 0);
pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0);
udelay(1);
}
unsigned int pmic_get_vdram1_vol(void)
@ -895,6 +896,7 @@ void pmic_set_vdram1_vol(unsigned int vdram_uv)
pwrap_write_field(PMIC_VDRAM1_OP_EN, 1, 0x7F, 0);
pwrap_write_field(PMIC_VDRAM1_VOSEL, vol_reg, 0x7F, 0);
udelay(1);
}
unsigned int pmic_get_vddq_vol(void)