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soc/amd/cezanne/fsp_m_params: set SATA enable UPD from devicetree info 

Currently the FSP only has one switch to disable both AHCI controllers.
If at least one of the two AHCI controller devices is enabled in the
board's devicetree, set the SATA enable UPD to 1 and otherwise set it to
0. Setting the UPD value to 0 when both AHCI controllers are disabled
saves around 60ms in boot time.

BUG=b:191385289

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I84e7c8bf2ab08c8254271ddfefd2e4e7d8c2e87b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55669
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Matt Papageorge <matthewpapa07@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2021-06-18 16:33:49 +02:00
parent d6d87767cb
commit ea668d74f3
1 changed files with 36 additions and 0 deletions
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36
src/soc/amd/cezanne/fsp_m_params.c
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@ -36,6 +36,41 @@ static bool devtree_gfx_hda_dev_enabled(void)
return gfx_hda_dev->enabled;
}
static const struct device_path sata0_path[] = {
{
.type = DEVICE_PATH_PCI,
.pci.devfn = PCIE_GPP_B_DEVFN
},
{
.type = DEVICE_PATH_PCI,
.pci.devfn = SATA0_DEVFN
},
};
static const struct device_path sata1_path[] = {
{
.type = DEVICE_PATH_PCI,
.pci.devfn = PCIE_GPP_B_DEVFN
},
{
.type = DEVICE_PATH_PCI,
.pci.devfn = SATA1_DEVFN
},
};
static bool devtree_sata_dev_enabled(void)
{
const struct device *ahci0_dev, *ahci1_dev;
ahci0_dev = find_dev_nested_path(pci_root_bus(), sata0_path, ARRAY_SIZE(sata0_path));
ahci1_dev = find_dev_nested_path(pci_root_bus(), sata1_path, ARRAY_SIZE(sata1_path));
if (!ahci0_dev || !ahci1_dev)
return false;
return ahci0_dev->enabled || ahci1_dev->enabled;
}
__weak void mb_pre_fspm(void)
{
}
@ -167,6 +202,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mcfg->pspp_policy = config->pspp_policy;
mcfg->enable_nb_azalia = devtree_gfx_hda_dev_enabled();
mcfg->sata_enable = devtree_sata_dev_enabled();
if (config->usb_phy_custom)
mcfg->usb_phy = (struct usb_phy_config *)&config->usb_phy;