From ea6a3b488c238f9b79ee3aeaedaf6b06e2dc4023 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 12 Nov 2022 11:46:42 +0100 Subject: [PATCH] util/autoport: Update devicetree generation CPU nodes are now declared in a common chipset.cb. TESTED: generates a proper devicetree for x220 based on logs. Change-Id: Ic1f2d3d611aa3979b846706b6f743f79a3c4e54d Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/69501 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- util/autoport/sandybridge.go | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go index 950286c6b6..a60018e955 100644 --- a/util/autoport/sandybridge.go +++ b/util/autoport/sandybridge.go @@ -35,34 +35,6 @@ func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) { "gfx": fmt.Sprintf("GMA_STATIC_DISPLAYS(%d)", (inteltool.IGD[0xc6200] >> 12) & 1), }, Children: []DevTreeNode{ - { - Chip: "cpu_cluster", - Dev: 0, - Children: []DevTreeNode{ - { - Chip: "cpu/intel/model_206ax", - Comment: "FIXME: check all registers", - Registers: map[string]string{ - /* FIXME:XX hardcoded. */ - "acpi_c1": "1", - "acpi_c2": "3", - "acpi_c3": "5", - }, - Children: []DevTreeNode{ - { - Chip: "lapic", - Dev: 0, - }, - { - Chip: "lapic", - Dev: 0xacac, - Disabled: true, - }, - }, - }, - }, - }, - { Chip: "domain", Dev: 0,