sb,soc/intel: Set IOAPIC max entries before APIC ID
This allows to replace set_ioapic_id() call with setup_ioapic() that also clears redirection table entries. Change-Id: I854f19c997a96bcdccb11a0906431e3291788cb6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55308 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
parent
6139ff9c9a
commit
ea6d12a0de
|
@ -29,11 +29,11 @@ static void pch_enable_ioapic(struct device *dev)
|
||||||
pci_write_config16(dev, LPC_IBDF,
|
pci_write_config16(dev, LPC_IBDF,
|
||||||
PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3);
|
PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3);
|
||||||
|
|
||||||
set_ioapic_id(VIO_APIC_VADDR, 0x02);
|
|
||||||
|
|
||||||
/* affirm full set of redirection table entries ("write once") */
|
/* affirm full set of redirection table entries ("write once") */
|
||||||
/* PCH-LP has 40 redirection entries */
|
/* PCH-LP has 40 redirection entries */
|
||||||
ioapic_set_max_vectors(VIO_APIC_VADDR, 40);
|
ioapic_set_max_vectors(VIO_APIC_VADDR, 40);
|
||||||
|
|
||||||
|
set_ioapic_id(VIO_APIC_VADDR, 0x02);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void enable_hpet(struct device *dev)
|
static void enable_hpet(struct device *dev)
|
||||||
|
|
|
@ -280,10 +280,10 @@ void lpc_disable_clkrun(void)
|
||||||
/* Enable PCH IOAPIC */
|
/* Enable PCH IOAPIC */
|
||||||
void pch_enable_ioapic(void)
|
void pch_enable_ioapic(void)
|
||||||
{
|
{
|
||||||
set_ioapic_id((void *)IO_APIC_ADDR, 0x02);
|
|
||||||
|
|
||||||
/* affirm full set of redirection table entries ("write once") */
|
/* affirm full set of redirection table entries ("write once") */
|
||||||
ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
|
ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
|
||||||
|
|
||||||
|
set_ioapic_id((void *)IO_APIC_ADDR, 0x02);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = {
|
static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = {
|
||||||
|
|
|
@ -31,10 +31,10 @@
|
||||||
*/
|
*/
|
||||||
static void pch_enable_ioapic(struct device *dev)
|
static void pch_enable_ioapic(struct device *dev)
|
||||||
{
|
{
|
||||||
set_ioapic_id((void *)IO_APIC_ADDR, IO_APIC0);
|
|
||||||
|
|
||||||
/* affirm full set of redirection table entries ("write once") */
|
/* affirm full set of redirection table entries ("write once") */
|
||||||
ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
|
ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
|
||||||
|
|
||||||
|
set_ioapic_id((void *)IO_APIC_ADDR, IO_APIC0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* interrupt router lookup for internal devices */
|
/* interrupt router lookup for internal devices */
|
||||||
|
|
|
@ -41,10 +41,10 @@ static void pch_enable_ioapic(struct device *dev)
|
||||||
pci_write_config16(dev, LPC_IBDF,
|
pci_write_config16(dev, LPC_IBDF,
|
||||||
PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3);
|
PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3);
|
||||||
|
|
||||||
set_ioapic_id(VIO_APIC_VADDR, 0x02);
|
|
||||||
|
|
||||||
/* affirm full set of redirection table entries ("write once") */
|
/* affirm full set of redirection table entries ("write once") */
|
||||||
ioapic_lock_max_vectors(VIO_APIC_VADDR);
|
ioapic_lock_max_vectors(VIO_APIC_VADDR);
|
||||||
|
|
||||||
|
set_ioapic_id(VIO_APIC_VADDR, 0x02);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pch_enable_serial_irqs(struct device *dev)
|
static void pch_enable_serial_irqs(struct device *dev)
|
||||||
|
|
|
@ -34,10 +34,10 @@ typedef struct southbridge_intel_ibexpeak_config config_t;
|
||||||
*/
|
*/
|
||||||
static void pch_enable_ioapic(struct device *dev)
|
static void pch_enable_ioapic(struct device *dev)
|
||||||
{
|
{
|
||||||
set_ioapic_id(VIO_APIC_VADDR, 0x01);
|
|
||||||
|
|
||||||
/* affirm full set of redirection table entries ("write once") */
|
/* affirm full set of redirection table entries ("write once") */
|
||||||
ioapic_lock_max_vectors(VIO_APIC_VADDR);
|
ioapic_lock_max_vectors(VIO_APIC_VADDR);
|
||||||
|
|
||||||
|
set_ioapic_id(VIO_APIC_VADDR, 0x01);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pch_enable_serial_irqs(struct device *dev)
|
static void pch_enable_serial_irqs(struct device *dev)
|
||||||
|
|
|
@ -35,14 +35,15 @@ static void pch_enable_ioapic(struct device *dev)
|
||||||
pci_write_config16(dev, LPC_IBDF,
|
pci_write_config16(dev, LPC_IBDF,
|
||||||
PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3);
|
PCH_IOAPIC_PCI_BUS << 8 | PCH_IOAPIC_PCI_SLOT << 3);
|
||||||
|
|
||||||
set_ioapic_id(VIO_APIC_VADDR, 0x02);
|
|
||||||
|
|
||||||
/* affirm full set of redirection table entries ("write once") */
|
/* affirm full set of redirection table entries ("write once") */
|
||||||
/* PCH-LP has 40 redirection entries */
|
/* PCH-LP has 40 redirection entries */
|
||||||
if (pch_is_lp())
|
if (pch_is_lp())
|
||||||
ioapic_set_max_vectors(VIO_APIC_VADDR, 40);
|
ioapic_set_max_vectors(VIO_APIC_VADDR, 40);
|
||||||
else
|
else
|
||||||
ioapic_lock_max_vectors(VIO_APIC_VADDR);
|
ioapic_lock_max_vectors(VIO_APIC_VADDR);
|
||||||
|
|
||||||
|
set_ioapic_id(VIO_APIC_VADDR, 0x02);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pch_enable_serial_irqs(struct device *dev)
|
static void pch_enable_serial_irqs(struct device *dev)
|
||||||
|
|
Loading…
Reference in New Issue