build system: normalize linker script file names
We have .lb, .lds, and .ld in the tree. Go for .ld everywhere. This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I3126af608afe4937ec4551a78df5a7824e09b04b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner@chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9107 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Patrick Georgi
Patrick Georgi
parent
276ff99a07
commit
ea9f308018
|
|
@ -72,13 +72,13 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l
|
|||
|
||||
ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y)
|
||||
|
||||
bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb
|
||||
bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds
|
||||
bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds
|
||||
bootblock_lds += $(src)/arch/x86/lib/id.lds
|
||||
bootblock_lds = $(src)/arch/x86/init/ldscript_failover.ld
|
||||
bootblock_lds += $(src)/cpu/x86/16bit/entry16.ld
|
||||
bootblock_lds += $(src)/cpu/x86/16bit/reset16.ld
|
||||
bootblock_lds += $(src)/arch/x86/lib/id.ld
|
||||
bootblock_lds += $(chipset_bootblock_lds)
|
||||
ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y)
|
||||
bootblock_lds += $(src)/cpu/intel/fit/fit.lds
|
||||
bootblock_lds += $(src)/cpu/intel/fit/fit.ld
|
||||
endif
|
||||
|
||||
bootblock_inc = $(src)/arch/x86/init/prologue.inc
|
||||
|
|
@ -141,7 +141,7 @@ crt0s = $(src)/arch/x86/init/prologue.inc
|
|||
ldscripts =
|
||||
ldscripts += $(src)/arch/x86/init/romstage.ld
|
||||
crt0s += $(src)/cpu/x86/32bit/entry32.inc
|
||||
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
|
||||
ldscripts += $(src)/cpu/x86/32bit/entry32.ld
|
||||
|
||||
crt0s += $(src)/cpu/x86/fpu_enable.inc
|
||||
ifeq ($(CONFIG_SSE),y)
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ subdirs-y += ../../x86/smm
|
|||
|
||||
chipset_bootblock_inc += $(src)/cpu/dmp/vortex86ex/biosdata.inc
|
||||
chipset_bootblock_inc += $(src)/cpu/dmp/vortex86ex/biosdata_ex.inc
|
||||
chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata.lds
|
||||
chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata_ex.lds
|
||||
chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata.ld
|
||||
chipset_bootblock_lds += $(src)/cpu/dmp/vortex86ex/biosdata_ex.ld
|
||||
|
||||
ROMCCFLAGS := -mcpu=i386 -O2
|
||||
|
|
|
|||
|
|
@ -24,4 +24,4 @@ ramstage-y += lpc.c
|
|||
ramstage-y += ide.c
|
||||
|
||||
chipset_bootblock_inc += $(src)/northbridge/via/vx800/romstrap.inc
|
||||
chipset_bootblock_lds += $(src)/northbridge/via/vx800/romstrap.lds
|
||||
chipset_bootblock_lds += $(src)/northbridge/via/vx800/romstrap.ld
|
||||
|
|
|
|||
|
|
@ -45,4 +45,4 @@ ramstage-y += ./../../../drivers/pc80/vga/vga_io.c
|
|||
|
||||
|
||||
chipset_bootblock_inc += $(src)/northbridge/via/vx900/romstrap.inc
|
||||
chipset_bootblock_lds += $(src)/northbridge/via/vx900/romstrap.lds
|
||||
chipset_bootblock_lds += $(src)/northbridge/via/vx900/romstrap.ld
|
||||
|
|
|
|||
|
|
@ -20,4 +20,4 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
|
|||
romstage-y += early_smbus.c
|
||||
|
||||
chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc
|
||||
chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.lds
|
||||
chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.ld
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ static void nic_init(struct device *dev)
|
|||
/* If that is invalid we will read that from romstrap. */
|
||||
if (!eeprom_valid) {
|
||||
u32 *mac_pos;
|
||||
mac_pos = (u32 *)0xffffffd0; /* See romstrap.inc and romstrap.lds. */
|
||||
mac_pos = (u32 *)0xffffffd0; /* See romstrap.inc and romstrap.ld. */
|
||||
mac_l = read32(mac_pos) + nic_index;
|
||||
mac_h = read32(mac_pos + 1);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,4 +19,4 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
|
|||
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
|
||||
|
||||
chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc
|
||||
chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.lds
|
||||
chipset_bootblock_lds += $(src)/southbridge/nvidia/mcp55/romstrap.ld
|
||||
|
|
|
|||
|
|
@ -162,7 +162,7 @@ static void nic_init(struct device *dev)
|
|||
// if that is invalid we will read that from romstrap
|
||||
if(!eeprom_valid) {
|
||||
u32 *mac_pos;
|
||||
mac_pos = (u32 *)0xffffffd0; // refer to romstrap.inc and romstrap.lds
|
||||
mac_pos = (u32 *)0xffffffd0; // refer to romstrap.inc and romstrap.ld
|
||||
mac_l = read32(mac_pos) + nic_index; // overflow?
|
||||
mac_h = read32(mac_pos + 1);
|
||||
|
||||
|
|
|
|||
|
|
@ -14,4 +14,4 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
|
|||
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
|
||||
|
||||
chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc
|
||||
chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds
|
||||
chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.ld
|
||||
|
|
|
|||
|
|
@ -9,4 +9,4 @@ ramstage-y += error.c
|
|||
ramstage-y += chrome.c
|
||||
|
||||
chipset_bootblock_inc += $(src)/southbridge/via/k8t890/romstrap.inc
|
||||
chipset_bootblock_lds += $(src)/southbridge/via/k8t890/romstrap.lds
|
||||
chipset_bootblock_lds += $(src)/southbridge/via/k8t890/romstrap.ld
|
||||
|
|
|
|||
Loading…
Reference in New Issue