gpio: Extend common GPIO header, simplify function names

We've had gpiolib.h which defines a few common GPIO access functions for
a while, but it wasn't really complete. This patch adds the missing
gpio_output() function, and also renames the unwieldy
gpio_get_in_value() and gpio_set_out_value() to the much easier to
handle gpio_get() and gpio_set(). The header is renamed to the simpler
gpio.h while we're at it (there was never really anything "lib" about
it, and it was presumably just chosen due to the IPQ806x include/
conflict problem that is now resolved).

It also moves the definition of gpio_t into SoC-specific code, so that
different implementations are free to encode their platform-specific
GPIO parameters in those 4 bytes in the most convenient way (such as the
rk3288 with a bitfield struct). Every SoC intending to use this common
API should supply a <soc/gpio.h> that typedefs gpio_t to a type at most
4 bytes in length. Files accessing the API only need to include <gpio.h>
which may pull in additional things (like a gpio_t creation macro) from
<soc/gpio.h> on its own.

For now the API is still only used on non-x86 SoCs. Whether it makes
sense to expand it to x86 as well should be separately evaluated at a
later point (by someone who understands those systems better). Also,
Exynos retains its old, incompatible GPIO API even though it would be a
prime candidate, because it's currently just not worth the effort.

BUG=None
TEST=Compiled on Daisy, Peach_Pit, Nyan_Blaze, Rush_Ryu, Storm and
Veyron_Pinky.

Change-Id: Ieee77373c2bd13d07ece26fa7f8b08be324842fe
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9e04902ada56b929e3829f2c3b4aeb618682096e
Original-Change-Id: I6c1e7d1e154d9b02288aabedb397e21e1aadfa15
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/220975
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9400
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/include/gpio.h

@@ -17,11 +17,22 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#ifndef __SRC_INCLUDE_GPIOLIB_H__
+#ifndef __SRC_INCLUDE_GPIO_H__
-#define __SRC_INCLUDE_GPIOLIB_H__
+#define __SRC_INCLUDE_GPIO_H__
 
-/* A generic type, use accessor macros to actually access the hardware. */
+#include <soc/gpio.h>
-typedef unsigned gpio_t;
+#include <types.h>
+
+/* <soc/gpio.h> must typedef a gpio_t that fits in 32 bits. */
+_Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio");
+
+/* The following functions must be implemented by SoC/board code. */
+int gpio_get(gpio_t gpio);
+void gpio_set(gpio_t gpio, int value);
+void gpio_input_pulldown(gpio_t gpio);
+void gpio_input_pullup(gpio_t gpio);
+void gpio_input(gpio_t gpio);
+void gpio_output(gpio_t gpio, int value);
 
 /*
  * Read the value presented by the set of GPIOs, when each pin is interpreted
@@ -36,16 +47,6 @@ typedef unsigned gpio_t;
  * tertiary: 1: pins are interpreted as a quad coded tertiary.
  *           0: pins are interpreted as a set of two bit fields.
  */
-int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary);
+int gpio_get_tristates(gpio_t gpio[], int num_gpio, int tertiary);
 
-/*
+#endif /* __SRC_INCLUDE_GPIO_H__ */
- * The following functions are not provided by the common library, but must be
- * implemented by the appropriate SOC/board instead.
- */
-int gpio_get_in_value(gpio_t gpio);
-void gpio_set_out_value(gpio_t gpio, int value);
-void gpio_input_pulldown(gpio_t gpio);
-void gpio_input_pullup(gpio_t gpio);
-void gpio_input(gpio_t gpio);
-
-#endif

src/lib/tristate_gpios.c

@@ -18,9 +18,9 @@
  */
 
 #include <delay.h>
-#include <gpiolib.h>
+#include <gpio.h>
 
-int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary)
+int gpio_get_tristates(gpio_t gpio[], int num_gpio, int tertiary)
 {
 	/*
 	 * GPIOs which are tied to stronger external pull up or pull down
@@ -45,7 +45,7 @@ int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary)
 
 	/* Get gpio values at internal pull up */
 	for (index = 0; index < num_gpio; ++index)
-		value[index] = gpio_get_in_value(gpio[index]);
+		value[index] = gpio_get(gpio[index]);
 
 	/* Enable internal pull down */
 	for (index = 0; index < num_gpio; ++index)
@@ -67,7 +67,7 @@ int gpio_get_in_tristate_values(gpio_t gpio[], int num_gpio, int tertiary)
 			id *= 3;
 		else
 			id <<= 2;
-		temp = gpio_get_in_value(gpio[index]);
+		temp = gpio_get(gpio[index]);
 		id += ((value[index] ^ temp) << 1) | temp;
 	}
 

src/mainboard/google/nyan/boardid.c

@@ -19,17 +19,17 @@
 
 #include <boardid.h>
 #include <console/console.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 
 uint8_t board_id(void)
 {
 	static int id = -1;
 
 	if (id < 0) {
-		id = gpio_get_in_value(GPIO(Q3)) << 0 |
+		id = gpio_get(GPIO(Q3)) << 0 |
-		     gpio_get_in_value(GPIO(T1)) << 1 |
+		     gpio_get(GPIO(T1)) << 1 |
-		     gpio_get_in_value(GPIO(X1)) << 2 |
+		     gpio_get(GPIO(X1)) << 2 |
-		     gpio_get_in_value(GPIO(X4)) << 3;
+		     gpio_get(GPIO(X4)) << 3;
 		printk(BIOS_SPEW, "Board ID: %#x.\n", id);
 	}
 

src/mainboard/google/nyan/bootblock.c

@@ -21,10 +21,10 @@
 #include <bootblock_common.h>
 #include <console/console.h>
 #include <device/i2c.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clk_rst.h>
 #include <soc/clock.h>
-#include <soc/gpio.h>
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/pinmux.h>
 #include <soc/spi.h>	/* FIXME: move back to soc code? */

src/mainboard/google/nyan/chromeos.c

@@ -22,7 +22,7 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
@@ -33,7 +33,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Write Protect: active low */
 	gpios->gpios[count].port = GPIO_R1_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(R1));
+	gpios->gpios[count].value = gpio_get(GPIO(R1));
 	strncpy((char *)gpios->gpios[count].name, "write protect",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -49,14 +49,14 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Lid: active high */
 	gpios->gpios[count].port = GPIO_R4_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(R4));
+	gpios->gpios[count].value = gpio_get(GPIO(R4));
 	strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
 	count++;
 
 	/* Power: active low */
 	gpios->gpios[count].port = GPIO_Q0_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(Q0));
+	gpios->gpios[count].value = gpio_get(GPIO(Q0));
 	strncpy((char *)gpios->gpios[count].name, "power",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -91,5 +91,5 @@ int get_recovery_mode_switch(void)
 
 int get_write_protect_state(void)
 {
-	return !gpio_get_in_value(GPIO(R1));
+	return !gpio_get(GPIO(R1));
 }

src/mainboard/google/nyan/early_configs.c

@@ -17,10 +17,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/early_configs.h>
-#include <soc/gpio.h>
 #include <soc/nvidia/tegra/i2c.h>
 
 static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

src/mainboard/google/nyan/mainboard.c

@@ -21,10 +21,10 @@
 #include <device/device.h>
 #include <elog.h>
 #include <boot/coreboot_tables.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/clk_rst.h>
-#include <soc/gpio.h>
 #include <soc/mc.h>
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/nvidia/tegra/usb.h>

src/mainboard/google/nyan/reset.c

@@ -18,7 +18,7 @@
  */
 
 #include <arch/io.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <reset.h>
 
 void hard_reset(void)

src/mainboard/google/nyan_big/boardid.c

@@ -19,7 +19,7 @@
 
 #include <boardid.h>
 #include <console/console.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <stdlib.h>
 
 uint8_t board_id(void)
@@ -29,7 +29,7 @@ uint8_t board_id(void)
 	if (id < 0) {
 		gpio_t gpio[] = {GPIO(Q3), GPIO(T1), GPIO(X1), GPIO(X4)};
 
-		id = gpio_get_in_tristate_values(gpio, ARRAY_SIZE(gpio), 0);
+		id = gpio_get_tristates(gpio, ARRAY_SIZE(gpio), 0);
 
 		printk(BIOS_SPEW, "Board TRISTATE ID: %#x.\n", id);
 	}

src/mainboard/google/nyan_big/bootblock.c

@@ -21,10 +21,10 @@
 #include <bootblock_common.h>
 #include <console/console.h>
 #include <device/i2c.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clk_rst.h>
 #include <soc/clock.h>
-#include <soc/gpio.h>
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/pinmux.h>
 #include <soc/spi.h>	/* FIXME: move back to soc code? */

src/mainboard/google/nyan_big/chromeos.c

@@ -22,7 +22,7 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
@@ -33,7 +33,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Write Protect: active low */
 	gpios->gpios[count].port = GPIO_R1_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(R1));
+	gpios->gpios[count].value = gpio_get(GPIO(R1));
 	strncpy((char *)gpios->gpios[count].name, "write protect",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -49,14 +49,14 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Lid: active high */
 	gpios->gpios[count].port = GPIO_R4_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(R4));
+	gpios->gpios[count].value = gpio_get(GPIO(R4));
 	strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
 	count++;
 
 	/* Power: active low */
 	gpios->gpios[count].port = GPIO_Q0_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(Q0));
+	gpios->gpios[count].value = gpio_get(GPIO(Q0));
 	strncpy((char *)gpios->gpios[count].name, "power",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -91,5 +91,5 @@ int get_recovery_mode_switch(void)
 
 int get_write_protect_state(void)
 {
-	return !gpio_get_in_value(GPIO(R1));
+	return !gpio_get(GPIO(R1));
 }

src/mainboard/google/nyan_big/early_configs.c

@@ -17,10 +17,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/early_configs.h>
-#include <soc/gpio.h>
 #include <soc/nvidia/tegra/i2c.h>
 
 static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE;

src/mainboard/google/nyan_big/mainboard.c

@@ -21,10 +21,10 @@
 #include <boot/coreboot_tables.h>
 #include <device/device.h>
 #include <elog.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clk_rst.h>
 #include <soc/clock.h>
-#include <soc/gpio.h>
 #include <soc/mc.h>
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/pmc.h>

src/mainboard/google/nyan_big/reset.c

@@ -18,7 +18,7 @@
  */
 
 #include <arch/io.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <reset.h>
 
 void hard_reset(void)

src/mainboard/google/nyan_blaze/boardid.c

@@ -19,7 +19,7 @@
 
 #include <boardid.h>
 #include <console/console.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <stdlib.h>
 
 uint8_t board_id(void)
@@ -29,7 +29,7 @@ uint8_t board_id(void)
 	if (id < 0) {
 		gpio_t gpio[] = {GPIO(Q3), GPIO(T1), GPIO(X1), GPIO(X4)};
 
-		id = gpio_get_in_tristate_values(gpio, ARRAY_SIZE(gpio), 0);
+		id = gpio_get_tristates(gpio, ARRAY_SIZE(gpio), 0);
 
 		printk(BIOS_SPEW, "Board TRISTATE ID: %#x.\n", id);
 	}

src/mainboard/google/nyan_blaze/bootblock.c

@@ -21,10 +21,10 @@
 #include <bootblock_common.h>
 #include <console/console.h>
 #include <device/i2c.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clk_rst.h>
 #include <soc/clock.h>
-#include <soc/gpio.h>
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/pinmux.h>
 #include <soc/spi.h>	/* FIXME: move back to soc code? */

src/mainboard/google/nyan_blaze/chromeos.c

@@ -21,7 +21,7 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
@@ -37,7 +37,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Write Protect: active low */
 	gpios->gpios[count].port = GPIO_R1_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(R1));
+	gpios->gpios[count].value = gpio_get(GPIO(R1));
 	strncpy((char *)gpios->gpios[count].name, "write protect",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -53,14 +53,14 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Lid: active high */
 	gpios->gpios[count].port = GPIO_R4_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(R4));
+	gpios->gpios[count].value = gpio_get(GPIO(R4));
 	strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
 	count++;
 
 	/* Power: active low */
 	gpios->gpios[count].port = GPIO_Q0_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(Q0));
+	gpios->gpios[count].value = gpio_get(GPIO(Q0));
 	strncpy((char *)gpios->gpios[count].name, "power",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -95,5 +95,5 @@ int get_recovery_mode_switch(void)
 
 int get_write_protect_state(void)
 {
-	return !gpio_get_in_value(GPIO(R1));
+	return !gpio_get(GPIO(R1));
 }

src/mainboard/google/nyan_blaze/early_configs.c

@@ -17,9 +17,9 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
-#include <soc/gpio.h>
 #include <soc/early_configs.h>
 #include <soc/nvidia/tegra/i2c.h>
 

src/mainboard/google/nyan_blaze/mainboard.c

@@ -21,10 +21,10 @@
 #include <boot/coreboot_tables.h>
 #include <device/device.h>
 #include <elog.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/clk_rst.h>
-#include <soc/gpio.h>
 #include <soc/mc.h>
 #include <soc/nvidia/tegra/i2c.h>
 #include <soc/nvidia/tegra/usb.h>

src/mainboard/google/nyan_blaze/reset.c

@@ -18,7 +18,7 @@
  */
 
 #include <arch/io.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <reset.h>
 
 void hard_reset(void)

src/mainboard/google/rush/boardid.c

@@ -19,17 +19,17 @@
 
 #include <boardid.h>
 #include <console/console.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 
 uint8_t board_id(void)
 {
 	static int id = -1;
 
 	if (id < 0) {
-		id = gpio_get_in_value(GPIO(Q3)) << 0 |
+		id = gpio_get(GPIO(Q3)) << 0 |
-		     gpio_get_in_value(GPIO(T1)) << 1 |
+		     gpio_get(GPIO(T1)) << 1 |
-		     gpio_get_in_value(GPIO(X1)) << 2 |
+		     gpio_get(GPIO(X1)) << 2 |
-		     gpio_get_in_value(GPIO(X4)) << 3;
+		     gpio_get(GPIO(X4)) << 3;
 		printk(BIOS_SPEW, "Board ID: %#x.\n", id);
 	}
 

src/mainboard/google/rush/chromeos.c

@@ -21,7 +21,7 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
@@ -32,7 +32,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Write Protect: active low */
 	gpios->gpios[count].port = GPIO_R1_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO(R1));
+	gpios->gpios[count].value = gpio_get(GPIO(R1));
 	strncpy((char *)gpios->gpios[count].name, "write protect",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -90,5 +90,5 @@ int get_recovery_mode_switch(void)
 
 int get_write_protect_state(void)
 {
-	return !gpio_get_in_value(GPIO(R1));
+	return !gpio_get(GPIO(R1));
 }

src/mainboard/google/rush/reset.c

@@ -18,7 +18,7 @@
  */
 
 #include <arch/io.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <reset.h>
 
 void hard_reset(void)

src/mainboard/google/rush_ryu/boardid.c

@@ -19,7 +19,6 @@
 
 #include <boardid.h>
 #include <console/console.h>
-#include <soc/gpio.h>
 #include <stdlib.h>
 
 #include "gpio.h"
@@ -75,8 +74,7 @@ uint8_t board_id(void)
 		int tristate_id;
 		gpio_t gpio[] = { BD_ID0, BD_ID1 };
 
-		tristate_id = gpio_get_in_tristate_values(gpio,
+		tristate_id = gpio_get_tristates(gpio, ARRAY_SIZE(gpio), 0);
-							ARRAY_SIZE(gpio), 0);
 
 		for (i = 0; i < ARRAY_SIZE(bdid_map); i++) {
 			if (tristate_id != bdid_map[i].tri_state_value)

src/mainboard/google/rush_ryu/chromeos.c

@@ -33,7 +33,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Write Protect: active low */
 	gpios->gpios[count].port = WRITE_PROTECT_L_INDEX;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(WRITE_PROTECT_L);
+	gpios->gpios[count].value = gpio_get(WRITE_PROTECT_L);
 	strncpy((char *)gpios->gpios[count].name, "write protect",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -51,7 +51,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Power: active low */
 	gpios->gpios[count].port = POWER_BUTTON_INDEX,
 	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_in_value(POWER_BUTTON);
+	gpios->gpios[count].value = gpio_get(POWER_BUTTON);
 	strncpy((char *)gpios->gpios[count].name, "power",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -86,5 +86,5 @@ int get_recovery_mode_switch(void)
 
 int get_write_protect_state(void)
 {
-	return !gpio_get_in_value(WRITE_PROTECT_L);
+	return !gpio_get(WRITE_PROTECT_L);
 }

src/mainboard/google/rush_ryu/gpio.h

@@ -20,7 +20,7 @@
 #ifndef __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
 #define __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__
 
-#include <soc/gpio.h>
+#include <gpio.h>
 
 /* Board ID definitions. */
 enum {

src/mainboard/google/rush_ryu/romstage.c

@@ -69,7 +69,7 @@ static void lte_modem_init(void)
 	int mdm_det;
 
 	/* A LTE modem is present if MDM_DET is pulled down by the modem */
-	mdm_det = gpio_get_in_value(MDM_DET);
+	mdm_det = gpio_get(MDM_DET);
 	if (mdm_det == 1)
 		return;
 

src/mainboard/google/storm/boardid.c

@@ -18,15 +18,15 @@
  */
 
 #include <boardid.h>
-#include <gpiolib.h>
+#include <gpio.h>
 #include <console/console.h>
 #include <stdlib.h>
 
 /*
  * Storm boards dedicate to the board ID three GPIOs in tertiary mode: 29, 30
  * and 68. On proto0 GPIO68 is used and tied low, so it reads as 'zero' by
- * gpio_get_in_tristate_values(), whereas the other two pins are not connected
+ * gpio_get_tristates(), whereas the other two pins are not connected
- * and read as 'two'. This results in gpio_get_in_tristate_values() returning
+ * and read as 'two'. This results in gpio_get_tristates() returning
  * 8 on proto0.
  *
  * Three tertitiary signals could represent 27 different values. To make
@@ -45,8 +45,7 @@ static uint8_t get_board_id(void)
 	gpio_t hw_rev_gpios[] = {29, 30, 68};
 	int offset = 19;
 
-	bid = gpio_get_in_tristate_values(hw_rev_gpios,
+	bid = gpio_get_tristates(hw_rev_gpios, ARRAY_SIZE(hw_rev_gpios), 1);
-					  ARRAY_SIZE(hw_rev_gpios), 1);
 	bid = (bid + offset) % 27;
 	printk(BIOS_INFO, "Board ID %d\n", bid);
 

src/mainboard/google/storm/cdp.c

@@ -1,7 +1,7 @@
 
 /* * Copyright (c) 2012 - 2013 The Linux Foundation. All rights reserved.* */
 
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <soc/cdp.h>
 #include <types.h>
 

src/mainboard/google/storm/mainboard.c

@@ -23,9 +23,8 @@
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
-#include <gpiolib.h>
+#include <gpio.h>
 #include <soc/clock.h>
-#include <soc/gpio.h>
 #include <soc/usb.h>
 #include <string.h>
 #include <symbols.h>
@@ -46,7 +45,7 @@ static void setup_usb(void)
 #if !CONFIG_BOARD_VARIANT_AP148
 	gpio_tlmm_config_set(USB_ENABLE_GPIO, FUNC_SEL_GPIO,
 			     GPIO_PULL_UP, GPIO_10MA, GPIO_ENABLE);
-	gpio_set_out_value(USB_ENABLE_GPIO, 1);
+	gpio_set(USB_ENABLE_GPIO, 1);
 #endif
 	usb_clock_config();
 
@@ -86,9 +85,9 @@ static void setup_tpm(void)
 	 * make it twice as long. If the output was driven low originally, the
 	 * reset pulse will be even longer.
 	 */
-	gpio_set_out_value(TPM_RESET_GPIO, 0);
+	gpio_set(TPM_RESET_GPIO, 0);
 	udelay(160);
-	gpio_set_out_value(TPM_RESET_GPIO, 1);
+	gpio_set(TPM_RESET_GPIO, 1);
 }
 
 #define SW_RESET_GPIO 26
@@ -106,7 +105,7 @@ static void deassert_sw_reset(void)
 	gpio_tlmm_config_set(SW_RESET_GPIO, FUNC_SEL_GPIO,
 			     GPIO_PULL_UP, GPIO_4MA, GPIO_ENABLE);
 
-	gpio_set_out_value(SW_RESET_GPIO, 0);
+	gpio_set(SW_RESET_GPIO, 0);
 }
 
 static void mainboard_init(device_t dev)
@@ -148,7 +147,7 @@ static int read_gpio(gpio_t gpio_num)
 	gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE,
 			     GPIO_NO_PULL, GPIO_2MA, GPIO_DISABLE);
 	udelay(10); /* Should be enough to settle. */
-	return gpio_get_in_value(gpio_num);
+	return gpio_get(gpio_num);
 }
 
 void fill_lb_gpios(struct lb_gpios *gpios)

src/mainboard/google/veyron_pinky/board.h

@@ -21,7 +21,7 @@
 #define __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H
 
 #include <boardid.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 
 #define PMIC_BUS 0
 

src/mainboard/google/veyron_pinky/boardid.c

@@ -19,7 +19,7 @@
 
 #include <boardid.h>
 #include <console/console.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <stdlib.h>
 
 uint8_t board_id(void)
@@ -38,7 +38,7 @@ uint8_t board_id(void)
 		id = 0;
 		for (i = 0; i < ARRAY_SIZE(pins); i++) {
 			gpio_input(pins[i]);
-			id |= gpio_get_in_value(pins[i]) << i;
+			id |= gpio_get(pins[i]) << i;
 		}
 		printk(BIOS_SPEW, "Board ID: %#x.\n", id);
 	}

src/mainboard/google/veyron_pinky/chromeos.c

@@ -21,7 +21,7 @@
 #include <console/console.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <string.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
@@ -47,7 +47,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Write Protect: active low */
 	gpios->gpios[count].port = GPIO_WP.raw;
 	gpios->gpios[count].polarity = ACTIVE_LOW;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO_WP);
+	gpios->gpios[count].value = gpio_get(GPIO_WP);
 	strncpy((char *)gpios->gpios[count].name, "write protect",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -63,14 +63,14 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 	/* Lid: active high */
 	gpios->gpios[count].port = GPIO_LID.raw;
 	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO_LID);
+	gpios->gpios[count].value = gpio_get(GPIO_LID);
 	strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
 	count++;
 
 	/* Power:GPIO active high */
 	gpios->gpios[count].port = GPIO_POWER.raw;
 	gpios->gpios[count].polarity = ACTIVE_HIGH;
-	gpios->gpios[count].value = gpio_get_in_value(GPIO_POWER);
+	gpios->gpios[count].value = gpio_get(GPIO_POWER);
 	strncpy((char *)gpios->gpios[count].name, "power",
 		GPIO_MAX_NAME_LENGTH);
 	count++;
@@ -99,7 +99,7 @@ int get_recovery_mode_switch(void)
 	uint32_t ec_events;
 
 	/* The GPIO is active low. */
-	if (!gpio_get_in_value(GPIO_RECOVERY))
+	if (!gpio_get(GPIO_RECOVERY))
 		return 1;
 
 	ec_events = google_chromeec_get_events_b();
@@ -109,6 +109,6 @@ int get_recovery_mode_switch(void)
 
 int get_write_protect_state(void)
 {
-	return !gpio_get_in_value(GPIO_WP);
+	return !gpio_get(GPIO_WP);
 }
 

src/mainboard/google/veyron_pinky/mainboard.c

@@ -19,13 +19,13 @@
 
 #include <arch/cache.h>
 #include <arch/io.h>
+#include <boot/coreboot_tables.h>
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
-#include <edid.h>
-#include <boot/coreboot_tables.h>
 #include <device/i2c.h>
-#include <soc/gpio.h>
+#include <edid.h>
+#include <gpio.h>
 #include <soc/grf.h>
 #include <soc/soc.h>
 #include <soc/pmu.h>

src/mainboard/google/veyron_pinky/reset.c

@@ -18,7 +18,7 @@
  */
 
 #include <arch/io.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <reset.h>
 
 #include "board.h"

src/mainboard/google/veyron_pinky/sdram_configs.c

@@ -18,8 +18,8 @@
  */
 #include <arch/io.h>
 #include <console/console.h>
+#include <gpio.h>
 #include <soc/sdram.h>
-#include <soc/gpio.h>
 #include <string.h>
 #include <types.h>
 
@@ -56,10 +56,10 @@ u32 sdram_get_ram_code(void)
 	gpio_input(GPIO_RAMCODE2);
 	gpio_input(GPIO_RAMCODE3);
 
-	code = gpio_get_in_value(GPIO_RAMCODE3) << 3
+	code = gpio_get(GPIO_RAMCODE3) << 3
-			| gpio_get_in_value(GPIO_RAMCODE2) << 2
+			| gpio_get(GPIO_RAMCODE2) << 2
-			| gpio_get_in_value(GPIO_RAMCODE1) << 1
+			| gpio_get(GPIO_RAMCODE1) << 1
-			| gpio_get_in_value(GPIO_RAMCODE0) << 0;
+			| gpio_get(GPIO_RAMCODE0) << 0;
 
 	return code;
 }

src/soc/nvidia/tegra/gpio.c

@@ -19,16 +19,15 @@
 
 #include <arch/io.h>
 #include <console/console.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
 #include <stddef.h>
 #include <stdint.h>
 #include <delay.h>
-#include <gpiolib.h>
 
-#include "gpio.h"
 #include "pinmux.h"
 
-void __gpio_input(gpio_t gpio, u32 pull)
+static void __gpio_input(gpio_t gpio, u32 pull)
 {
 	u32 pinmux_config = PINMUX_INPUT_ENABLE | pull;
 
@@ -38,10 +37,10 @@ void __gpio_input(gpio_t gpio, u32 pull)
 	pinmux_set_config(gpio >> GPIO_PINMUX_SHIFT, pinmux_config);
 }
 
-void __gpio_output(gpio_t gpio, int value, u32 od)
+static void __gpio_output(gpio_t gpio, int value, u32 od)
 {
 	gpio_set_int_enable(gpio, 0);
-	gpio_set_out_value(gpio, value);
+	gpio_set(gpio, value);
 	gpio_set_out_enable(gpio, 1);
 	gpio_set_mode(gpio, GPIO_MODE_GPIO);
 	pinmux_set_config(gpio >> GPIO_PINMUX_SHIFT, PINMUX_PULL_NONE | od);
@@ -121,7 +120,7 @@ int gpio_get_out_enable(gpio_t gpio)
 	return (port & (1 << bit)) != 0;
 }
 
-void gpio_set_out_value(gpio_t gpio, int value)
+void gpio_set(gpio_t gpio, int value)
 {
 	int bit = gpio % GPIO_GPIOS_PER_PORT;
 	gpio_write_port(gpio & ((1 << GPIO_PINMUX_SHIFT) - 1),
@@ -137,7 +136,7 @@ int gpio_get_out_value(gpio_t gpio)
 	return (port & (1 << bit)) != 0;
 }
 
-int gpio_get_in_value(gpio_t gpio)
+int gpio_get(gpio_t gpio)
 {
 	int bit = gpio % GPIO_GPIOS_PER_PORT;
 	u32 port = gpio_read_port(gpio & ((1 << GPIO_PINMUX_SHIFT) - 1),
@@ -212,3 +211,13 @@ void gpio_input(gpio_t gpio)
 {
 	__gpio_input(gpio, PINMUX_PULL_NONE);
 }
+
+void gpio_output(gpio_t gpio, int value)
+{
+	__gpio_output(gpio, value, 0);
+}
+
+void gpio_output_open_drain(gpio_t gpio, int value)
+{
+	__gpio_output(gpio, value, PINMUX_OPEN_DRAIN);
+}

src/soc/nvidia/tegra/gpio.h

@@ -21,29 +21,15 @@
 #define __SOC_NVIDIA_TEGRA_GPIO_H__
 
 #include <stdint.h>
-#include <gpiolib.h>
 
 #include "pinmux.h"
 
+typedef u32 gpio_t;
+
 #define GPIO_PINMUX_SHIFT 16
 #define GPIO(name) ((gpio_t)(GPIO_##name##_INDEX | \
 			     (PINMUX_GPIO_##name << GPIO_PINMUX_SHIFT)))
 
-void __gpio_output(gpio_t gpio, int value, u32 open_drain);
-void __gpio_input(gpio_t gpio, u32 pull);
-
-/* Higher level function wrappers for common GPIO configurations. */
-
-static inline void gpio_output(gpio_t gpio, int value)
-{
-	__gpio_output(gpio, value, 0);
-}
-
-static inline void gpio_output_open_drain(gpio_t gpio, int value)
-{
-	__gpio_output(gpio, value, PINMUX_OPEN_DRAIN);
-}
-
 /* Functions to modify specific GPIO control values. */
 
 enum gpio_mode {
@@ -72,6 +58,8 @@ void gpio_get_int_level(gpio_t gpio, int *high_rise, int *edge, int *delta);
 
 void gpio_set_int_clear(gpio_t gpio);
 
+void gpio_output_open_drain(gpio_t gpio, int value);
+
 /* Hardware definitions. */
 
 enum {

src/soc/nvidia/tegra/software_i2c.c

@@ -18,7 +18,7 @@
  */
 
 #include <device/i2c.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <soc/pinmux.h>
 
 #include "i2c.h"
@@ -58,12 +58,12 @@ static void tegra_set_scl(unsigned bus, int high)
 
 static int tegra_get_sda(unsigned bus)
 {
-	return gpio_get_in_value(pins[bus].sda);
+	return gpio_get(pins[bus].sda);
 }
 
 static int tegra_get_scl(unsigned bus)
 {
-	return gpio_get_in_value(pins[bus].scl);
+	return gpio_get(pins[bus].scl);
 }
 
 static struct software_i2c_ops tegra_ops = {

src/soc/nvidia/tegra124/chip.h

@@ -20,8 +20,8 @@
 #ifndef __SOC_NVIDIA_TEGRA124_CHIP_H__
 #define __SOC_NVIDIA_TEGRA124_CHIP_H__
 #include <arch/cache.h>
+#include <gpio.h>
 #include <soc/addressmap.h>
-#include <soc/gpio.h>
 
 #define EFAULT  1
 #define EINVAL  2

src/soc/qualcomm/ipq806x/gpio.c

@@ -29,7 +29,7 @@
  */
 
 #include <arch/io.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <soc/iomap.h>
 
 /*******************************************************
@@ -116,7 +116,7 @@ unsigned *out - Value of GPIO output
 
 Return : None
 *******************************************************/
-int gpio_get_in_value(gpio_t gpio)
+int gpio_get(gpio_t gpio)
 {
 	if (gpio_not_valid(gpio))
 		return -1;
@@ -126,7 +126,7 @@ int gpio_get_in_value(gpio_t gpio)
 		GPIO_IO_IN_MASK;
 }
 
-void gpio_set_out_value(gpio_t gpio, int value)
+void gpio_set(gpio_t gpio, int value)
 {
 	if (gpio_not_valid(gpio))
 		return;

src/soc/qualcomm/ipq806x/include/soc/gpio.h

@@ -33,7 +33,7 @@
 #ifndef __SOC_QUALCOMM_IPQ806X_GPIO_H_
 #define __SOC_QUALCOMM_IPQ806X_GPIO_H_
 
-#include <gpiolib.h>
+#include <types.h>
 
 #define GPIO_FUNC_ENABLE			1
 #define GPIO_FUNC_DISABLE			0
@@ -90,6 +90,8 @@
 #define GPIO_IO_IN_SHIFT      0
 #define GPIO_IO_OUT_SHIFT     1
 
+typedef u32 gpio_t;
+
 void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
 			  unsigned int pull, unsigned int drvstr,
 			  unsigned int enable);

src/soc/qualcomm/ipq806x/spi.c

@@ -4,7 +4,7 @@
 
 #include <arch/io.h>
 #include <delay.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <soc/iomap.h>
 #include <soc/spi.h>
 #include <stdlib.h>

src/soc/qualcomm/ipq806x/uart.c

@@ -36,8 +36,8 @@
 #include <console/console.h>
 #include <console/uart.h>
 #include <delay.h>
+#include <gpio.h>
 #include <soc/clock.h>
-#include <soc/gpio.h>
 #include <soc/gsbi.h>
 #include <soc/ipq_uart.h>
 #include <stdint.h>

src/soc/rockchip/rk3288/gpio.c

@@ -19,10 +19,10 @@
 
 #include <arch/io.h>
 #include <console/console.h>
-#include <soc/soc.h>
+#include <gpio.h>
-#include <soc/gpio.h>
 #include <soc/grf.h>
 #include <soc/pmu.h>
+#include <soc/soc.h>
 #include <stdlib.h>
 
 struct rk3288_gpio_regs *gpio_port[] = {
@@ -72,7 +72,7 @@ void gpio_input_pullup(gpio_t gpio)
 	__gpio_input(gpio, PULLUP);
 }
 
-int gpio_get_in_value(gpio_t gpio)
+int gpio_get(gpio_t gpio)
 {
 	return (readl(&gpio_port[gpio.port]->ext_porta) >> gpio.num) & 0x1;
 }

src/soc/rockchip/rk3288/include/soc/gpio.h

@@ -67,10 +67,4 @@ enum {
 	GPIO_D,
 };
 
-void gpio_input(gpio_t gpio);
+#endif	/* __SOC_ROCKCHIP_RK3288_GPIO_H__ */
-void gpio_input_pulldown(gpio_t gpio);
-void gpio_input_pullup(gpio_t gpio);
-void gpio_output(gpio_t gpio, int value);
-int gpio_get_in_value(gpio_t gpio);
-
-#endif	/* _ASM_ROCKCHIP_GPIO_H_ */

src/soc/rockchip/rk3288/soc.c

@@ -22,7 +22,7 @@
 #include <console/console.h>
 #include <delay.h>
 #include <device/device.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <soc/soc.h>
 #include <stddef.h>
 #include <stdlib.h>

src/soc/samsung/exynos5250/include/soc/gpio.h

@@ -22,6 +22,8 @@
 
 #include <soc/cpu.h>
 
+/* TODO: Align interface to src/include/gpio.h! */
+
 struct gpio_bank {
 	unsigned int	con;
 	unsigned int	dat;

src/soc/samsung/exynos5420/include/soc/gpio.h

@@ -22,6 +22,8 @@
 
 #include <soc/cpu.h>
 
+/* TODO: Align interface to src/include/gpio.h! */
+
 struct gpio_bank {
 	unsigned int	con;
 	unsigned int	dat;