purism/librem13v2: Add audio support

Initialize the audio codec without depending on DSP binary blobs.
The hda_verb.c was copied from the intel/kblrvp rvp7 variant, and the
hda_verb.h file was copied from the purism/librem13.

The IoBufferOwnership FSP option in devicetree has to be 0 for the azalia
driver to work.

Change-Id: Ifa36ac0839daedfa59c497057da0ace04d401f2a
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/19943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

src/mainboard/purism/librem13v2/Kconfig

@@ -4,8 +4,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select SYSTEM_TYPE_LAPTOP
 	select BOARD_ROMSIZE_KB_16384
-	select DRIVERS_I2C_GENERIC
-	select DRIVERS_I2C_NAU8825
 	select HAVE_ACPI_RESUME
 	select HAVE_ACPI_TABLES
 	select SOC_INTEL_SKYLAKE

src/mainboard/purism/librem13v2/Makefile.inc

@@ -15,7 +15,7 @@
 
 romstage-y += pei_data.c
 
-ramstage-y += mainboard.c
 ramstage-y += pei_data.c
 ramstage-y += ramstage.c
+ramstage-y += hda_verb.c
 

src/mainboard/purism/librem13v2/devicetree.cb

@@ -34,8 +34,8 @@ chip soc/intel/skylake
 	register "SataPortsEnable[0]" = "1"
 	register "SataPortsEnable[2]" = "1"
 	register "EnableAzalia" = "1"
-	register "DspEnable" = "1"
+	register "DspEnable" = "0"
-	register "IoBufferOwnership" = "3"
+	register "IoBufferOwnership" = "0"
 	register "EnableTraceHub" = "0"
 	register "XdciEnable" = "0"
 	register "SsicPortEnable" = "0"

src/mainboard/purism/librem13v2/hda_verb.c

@@ -0,0 +1,83 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation
+ * (Written by Naresh G Solanki <naresh.solanki@intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootstate.h>
+#include <chip.h>
+#include <console/console.h>
+#include <device/azalia_device.h>
+#include <soc/intel/common/hda_verb.h>
+#include <soc/pci_devs.h>
+
+#include "hda_verb.h"
+
+static void codecs_init(u8 *base, u32 codec_mask)
+{
+	int i;
+
+	/* Can support up to 4 codecs */
+	for (i = 3; i >= 0; i--) {
+		if (codec_mask & (1 << i))
+			hda_codec_init(base, i, cim_verb_data_size,
+					cim_verb_data);
+	}
+
+	if (pc_beep_verbs_size)
+		hda_codec_write(base, pc_beep_verbs_size, pc_beep_verbs);
+}
+
+static void mb_hda_codec_init(void *unused)
+{
+	static struct soc_intel_skylake_config *config;
+	u8 *base;
+	struct resource *res;
+	u32 codec_mask;
+	struct device *dev;
+
+	dev = SA_DEV_ROOT;
+	/* Check if HDA is enabled, else return */
+	if (dev == NULL || dev->chip_info == NULL)
+		return;
+
+	config = dev->chip_info;
+
+	/*
+	 * IoBufferOwnership 0:HD-A Link, 1:Shared HD-A Link and I2S Port,
+	 * 3:I2S Ports. In HDA mode where codec need to be programmed with
+	 * verb table
+	 */
+	if (config->IoBufferOwnership == 3)
+		return;
+
+	/* Find base address */
+	dev = dev_find_slot(0, PCH_DEVFN_HDA);
+	if (dev == NULL)
+		return;
+	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	if (!res)
+		return;
+
+	base = res2mmio(res, 0, 0);
+	printk(BIOS_DEBUG, "HDA: base = %p\n", base);
+
+	codec_mask = hda_codec_detect(base);
+
+	if (codec_mask) {
+		printk(BIOS_DEBUG, "HDA: codec_mask = %02x\n", codec_mask);
+		codecs_init(base, codec_mask);
+	}
+}
+
+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, mb_hda_codec_init, NULL);

src/mainboard/purism/librem13v2/hda_verb.h

@@ -0,0 +1,109 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef HDA_VERB_H
+#define HDA_VERB_H
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	/* coreboot specific header */
+	0x10ec0269,	/* Codec Vendor / Device ID: Realtek ALC269 */
+	0x19910269,	/* Subsystem ID */
+	0x0000000c,	/* Number of jacks (NID entries) */
+
+	0x0017ff00,	/* Function Reset */
+	0x0017ff00,	/* Double Function Reset */
+	0x0017ff00,
+	0x0017ff00,
+
+	/* Bits 31:28 - Codec Address */
+	/* Bits 27:20 - NID */
+	/* Bits 19:8 - Verb ID */
+	/* Bits 7:0  - Payload */
+
+	/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x19910269 */
+	0x00172069,
+	0x00172102,
+	0x00172291,
+	0x00172319,
+
+	/* Pin Widget Verb Table */
+
+	/* Pin Complex (NID 0x12) */
+	0x01271c00,
+	0x01271d00,
+	0x01271e00,
+	0x01271f40,
+
+	/* Pin Complex (NID 0x14) */
+	0x01471c10,
+	0x01471d01,
+	0x01471e17,
+	0x01471f90,
+
+	/* Pin Complex (NID 0x17) */
+	0x01771cf0,
+	0x01771d11,
+	0x01771e11,
+	0x01771f41,
+
+	/* Pin Complex (NID 0x18) */
+	0x01871c20,
+	0x01871d10,
+	0x01871ea1,
+	0x01871f04,
+
+	/* Pin Complex (NID 0x19) */
+	0x01971c30,
+	0x01971d01,
+	0x01971ea7,
+	0x01971f90,
+
+	/* Pin Complex (NID 0x1A) */
+	0x01a71cf0,
+	0x01a71d11,
+	0x01a71e11,
+	0x01a71f41,
+
+	/* Pin Complex (NID 0x1B) */
+	0x01b71cf0,
+	0x01b71d11,
+	0x01b71e11,
+	0x01b71f41,
+
+	/* Pin Complex (NID 0x1D) */
+	0x01d71c05,
+	0x01d71d9d,
+	0x01d71e56,
+	0x01d71f40,
+
+	/* Pin Complex (NID 0x1E) */
+	0x01e71cf0,
+	0x01e71d11,
+	0x01e71e11,
+	0x01e71f41,
+
+	/* Pin Complex (NID 0x21) */
+	0x02171c1f,
+	0x02171d10,
+	0x02171e21,
+	0x02171f04,
+};
+
+const u32 pc_beep_verbs[] = {
+};
+AZALIA_ARRAY_SIZES;
+#endif

src/mainboard/purism/librem13v2/mainboard.c

@@ -1,69 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- * Copyright (C) 2015 Google Inc.
- * Copyright (C) 2015 Intel Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <arch/acpi.h>
-#include <console/console.h>
-#include <device/device.h>
-#include <stdlib.h>
-#include <soc/nhlt.h>
-
-static unsigned long mainboard_write_acpi_tables(
-	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
-{
-	uintptr_t start_addr;
-	uintptr_t end_addr;
-	struct nhlt *nhlt;
-
-	start_addr = current;
-
-	nhlt = nhlt_init();
-
-	if (nhlt == NULL)
-		return start_addr;
-
-	/* 2 Channel DMIC array. */
-	if (nhlt_soc_add_dmic_array(nhlt, 2))
-		printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n");
-
-	/* ADI Smart Amps for left and right. */
-	if (nhlt_soc_add_ssm4567(nhlt, AUDIO_LINK_SSP0))
-		printk(BIOS_ERR, "Couldn't add ssm4567.\n");
-
-	/* NAU88l25 Headset codec. */
-	if (nhlt_soc_add_nau88l25(nhlt, AUDIO_LINK_SSP1))
-		printk(BIOS_ERR, "Couldn't add headset codec.\n");
-
-	end_addr = nhlt_soc_serialize(nhlt, start_addr);
-
-	if (end_addr != start_addr)
-		acpi_add_table(rsdp, (void *)start_addr);
-
-	return end_addr;
-}
-
-/*
- * mainboard_enable is executed as first thing after
- * enumerate_buses().
- */
-static void mainboard_enable(device_t dev)
-{
-	dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
-}
-
-struct chip_operations mainboard_ops = {
-	.enable_dev = mainboard_enable,
-};