GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/zork/mainboard: Remove unused pirq_data 

This table was wrong. It's also produced by the SoC code now.

BUG=b:170595019
TEST=Verify PCI IRQ: log messages

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I008b6896064672f9d45a8e12f6cfc62c0cc41536
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48666
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Raul E Rangel 2020-12-16 10:13:35 -07:00 committed by Felix Held
parent 4e80fae236
commit ead253a366
1 changed files with 0 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
src/mainboard/google/zork/mainboard.c
View File

@ -50,30 +50,6 @@ static uint8_t fch_apic_routing[0x80];
_Static_assert(sizeof(fch_pic_routing) == sizeof(fch_apic_routing),
"PIC and APIC FCH interrupt tables must be the same size");
/*
* This table doesn't actually perform any routing. It only populates the
* PCI_INTERRUPT_LINE register on the PCI device with the PIC value specified
* in fch_apic_routing. The linux kernel only looks at this field as a backup
* if ACPI routing fails to describe the PCI routing correctly. The linux kernel
* also uses the APIC by default, so the value coded into the registers will be
* wrong.
*
* This table is also confusing because PCI Interrupt routing happens at the
* device/slot level, not the function level.
*/
static const struct pirq_struct mainboard_pirq_data[] = {
{ PCIE_GPP_0_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } },
{ PCIE_GPP_1_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, // Bridge 1 - Wifi
{ PCIE_GPP_2_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, // Bridge 2 - SD
{ PCIE_GPP_3_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } },
{ PCIE_GPP_4_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } },
{ PCIE_GPP_5_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } },
{ PCIE_GPP_6_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } }, // Bridge 6 - NVME
{ PCIE_GPP_A_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } },
{ PCIE_GPP_B_DEVFN, { PIRQ_A, PIRQ_B, PIRQ_C, PIRQ_D } },
{ SMBUS_DEVFN, { PIRQ_SMBUS, PIRQ_NC, PIRQ_NC, PIRQ_NC } },
};
/*
* This controls the device -> IRQ routing.
*
@ -133,9 +109,6 @@ static void init_tables(void)
static void pirq_setup(void)
{
init_tables();
pirq_data_ptr = mainboard_pirq_data;
pirq_data_size = ARRAY_SIZE(mainboard_pirq_data);
intr_data_ptr = fch_apic_routing;
picr_data_ptr = fch_pic_routing;
}