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arch/x86/acpi_bert_storage.c: Use a common implementation 

All targets now use cbmem for the BERT region, so the implementation can
be common.

This also drops the obsolete comment about the need to have bert in a
reserved region (cbmem gets fixed to be in a reserved region).

Change-Id: I6f33d9e05a02492a1c91fb7af94aadaa9acd2931
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64602
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Arthur Heymans 2022-05-23 16:09:51 +02:00 committed by Felix Held
parent e40ca124c6
commit eafcc8e5b1
6 changed files with 17 additions and 43 deletions
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17
src/arch/x86/acpi_bert_storage.c
View File

@ -567,15 +567,16 @@ cper_ia32x64_context_t *cper_new_ia32x64_context_msr(
return ctx;
}
/* The region must be in memory marked as reserved. If not implemented,
* skip generating the information in the region.
*/
__weak void bert_reserved_region(void **start, size_t *size)
static void bert_reserved_region(void **start, size_t *size)
{
printk(BIOS_ERR, "%s not implemented. BERT region generation disabled\n",
__func__);
*start = NULL;
*size = 0;
if (!CONFIG(ACPI_BERT)) {
*start = NULL;
*size = 0;
} else {
*start = cbmem_add(CBMEM_ID_ACPI_BERT, CONFIG_ACPI_BERT_SIZE);
*size = CONFIG_ACPI_BERT_SIZE;
}
printk(BIOS_INFO, "Reserved BERT region base: %p, size: 0x%zx\n", *start, *size);
}
static void bert_storage_setup(void *unused)

3
src/arch/x86/include/arch/bert_storage.h
View File

@ -44,9 +44,6 @@
#define CRASHLOG_RECORD_TYPE 0x2
#define CRASHLOG_FW_ERR_REV 0x2
/* Get implementation-specific reserved area for generating BERT info */
void bert_reserved_region(void **start, size_t *size);
/* Get the region where BERT error structures have been constructed for
* generating the ACPI table
*/

8
src/soc/amd/common/block/cpu/noncar/memmap.c
View File

@ -2,7 +2,6 @@
#include <amdblocks/memmap.h>
#include <amdblocks/smm.h>
#include <arch/bert_storage.h>
#include <console/console.h>
#include <cbmem.h>
#include <cpu/amd/msr.h>
@ -59,10 +58,3 @@ void smm_region(uintptr_t *start, size_t *size)
once = 1;
}
}
void bert_reserved_region(void **start, size_t *size)
{
*start = cbmem_add(CBMEM_ID_ACPI_BERT, CONFIG_ACPI_BERT_SIZE);
*size = CONFIG_ACPI_BERT_SIZE;
printk(BIOS_INFO, "Reserved BERT region base: %p, size: 0x%zx\n", *start, *size);
}

13
src/soc/amd/stoneyridge/memmap.c
View File

@ -8,23 +8,10 @@
#include <cpu/amd/msr.h>
#include <cpu/amd/mtrr.h>
#include <cbmem.h>
#include <arch/bert_storage.h>
#include <soc/northbridge.h>
#include <soc/iomap.h>
#include <amdblocks/biosram.h>
void bert_reserved_region(void **start, size_t *size)
{
if (!CONFIG(ACPI_BERT)) {
*start = NULL;
*size = 0;
} else {
*start = cbmem_add(CBMEM_ID_ACPI_BERT, CONFIG_ACPI_BERT_SIZE);
*size = CONFIG_ACPI_BERT_SIZE;
}
printk(BIOS_INFO, "Reserved BERT region base: %p, size: 0x%zx\n", *start, *size);
}
void *cbmem_top_chipset(void)
{
msr_t tom = rdmsr(TOP_MEM);

8
src/soc/intel/common/block/systemagent/Kconfig
View File

@ -23,4 +23,12 @@ config SA_ENABLE_DPR
help
This option allows you to add the DMA Protected Range (DPR).
config ACPI_BERT_SIZE
hex
default 0x10000 if ACPI_BERT
default 0x0
help
Specify the amount of DRAM reserved for gathering the data used to
generate the ACPI table.
endif

11
src/soc/intel/common/block/systemagent/memmap.c
View File

@ -7,7 +7,6 @@
#include <cpu/x86/smm.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/systemagent.h>
#include <arch/bert_storage.h>
#include <types.h>
/*
@ -50,22 +49,12 @@
* +---------------------------+ 0
*/
#define BERT_REGION_MAX_SIZE 0x10000
void smm_region(uintptr_t *start, size_t *size)
{
*start = sa_get_tseg_base();
*size = sa_get_tseg_size();
}
void bert_reserved_region(void **start, size_t *size)
{
*start = cbmem_add(CBMEM_ID_ACPI_BERT, BERT_REGION_MAX_SIZE);
*size = BERT_REGION_MAX_SIZE;
printk(BIOS_DEBUG, "Reserving BERT start %lx, size %zx\n", (uintptr_t)*start, *size);
}
void fill_postcar_frame(struct postcar_frame *pcf)
{
/* FSP does not seem to bother w.r.t. alignment when asked to place cbmem_top() */